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Verification Platform Engineer, Platform Architecture

Apple

Cupertino, CAJobSeen 4w agoSeen in employer's feed 3 days ago

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At a glance

Compensation
No compensation found
Location
Cupertino, CA
Work Authorization
Not specified

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Job overview

Apple’s Platform Architecture group develops the next generation of Apple hardware and the tools to make it possible, building high‑performance verification systems that accelerate Apple silicon development and pushing pre‑silicon validation boundaries with simulation solutions.

Skills & qualifications

RequiredNice to have

Skills

SystemVerilogEda ToolingC++PerlPythonUVMDPI-CTestbench ArchitectureLECLinting / Static Analysis ToolsWaveform DebuggingSimulation / Emulation FlowsHigh-Performance ComputingCo‑Simulation ArchitecturesHardware Acceleration / EmulationAI Productivity PipelinesStrong Communication Skills

Qualifications

Bachelor’s Degree in Computer Engineering Electrical Engineering or Related FieldMaster’s Degree in Computer Engineering Electrical Engineering or Another Hardware-Related Field3+ Years of Relevant Experience

Full job description

Role Number: 200681120-0836

Summary

Apple’s Platform Architecture group develops the next generation of Apple hardware and the tools to make it possible. Our team builds high-performance verification systems that accelerate the development of Apple silicon. We aim to push the boundaries of pre-silicon validation with simulation solutions that apply and extend principles from hardware emulation.

Description

This role bridges Apple's next-generation platform technology with DV methodology and tooling.

We are seeking an engineer with background in Design Verification who is interested in cutting-edge verification techniques and comfortable rapidly prototyping solutions. In this role, you will enable transformational improvements to simulation throughput for DV workflows through testbench design, infrastructure improvements, and platform R&D.

Minimum Qualifications

  • Bachelor’s degree in Computer Engineering, Electrical Engineering, or a related field (or equivalent practical experience).

  • Experience with SystemVerilog and EDA tooling.

  • Experience with software development (e.g., using C++) and scripting (e.g., Perl or Python).

Preferred Qualifications

  • Master’s degree in Computer Engineering, Electrical Engineering, or another hardware-related field.

  • 3+ years of relevant experience.

  • Deep hands-on experience in Design Verification methodologies (UVM, DPI-C, testbench architecture).

  • Experience applying LEC, linting / static analysis tools, waveform debugging, and simulation / emulation flows.

  • Strong understanding of SystemVerilog simulation semantics (events, time, glitches); intuitive grasp for hardware representation (clocks, resets, latches).

  • Strong communication skills, with a proven history of cross-functional collaboration across silicon engineering, design verification, and EDA development teams and organizational boundaries.

  • Experience with software optimization, high-performance computing (HPC), co-simulation architectures, or hardware acceleration / emulation.

  • Development of agentic pipelines, graphs, skills, or similar work enabling AI productivity for other engineers.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.

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