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Design Verification Engineer | Sensing

Texas Instruments

Dallas, TXJobSeen 2mo agoSeen in employer's feed 5 days ago

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At a glance

Compensation
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Location
Dallas, TX
Work Authorization
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Requirements

Credentials this posting asks for.

Master's degree

Job overview

Texas Instruments is hiring a Design Verification Engineer | Sensing. Texas Instruments is seeking a Design Verification Engineer to work on advanced mixed-signal sensor circuits. This role involves digital and AMS verification of high-performance digital circuits interfacing with leading-edge analog circuitry. The engineer will develop detailed verification plans, create SystemVerilog chip-level testcases, and ensure designs are bug-free and robust.

Key focus areas include Develop detailed Verification/Test plans using specifications to cover all the digital/analog functionality/features of a mixed-signal chip for our next generation designs., Develop SystemVerilog chip-level testcases based on the verification plan., and Simulation, Testcase debug and Verification closure for the digital/analog functionality of Mixed-signal chips, at chip-level in digital and AMS environment..

Successful candidates bring Masters In Electrical Engineering, 3+ Years Related Experience, and Strong Hands On Working Experience In Digital/AMS Verification. Important skills include Digital/AMS Verification, Mixed-Signal Chips, DV Flows, DV Concepts, Class-Based Verification, and Develop Verification/Test Plans. Preferred (not required): Verilog, Simulation, Verification Closure, and Verification Plan Development.

Skills & qualifications

RequiredNice to have

Skills

VerilogDigital/AMS VerificationMixed-Signal ChipsDV FlowsDV ConceptsClass-Based VerificationDevelop Verification/Test PlansSimulationTestcase DebugVerification ClosureFinding Design BugsRunning RegressionsDV Closure ActivitiesDesign for TestabilityAd-Hoc TestingFull Scan TestingIDDQ TestingVBOX TestingATPGBISTDocumentationReviewsVerification Flow Improvement StrategiesRisk AssessmentDrive SolutionsVerification Plan DevelopmentChip-Level TestcasesCode CoverageFunctional CoverageRandom/Constrained Random VerificationCadence Debug ToolsUARTSPII2CDebugging SkillsWork IndependentlySelf-DrivenMotivated

Qualifications

Master's Degree in Electrical Engineering or Related Field3+ Years of Related Experience

Full job description

Change the world. Love your job.

Texas Instruments is seeking Design Verification Engineer. In this position, you will be working on advanced mixed-signal sensor circuits using state-of-the art process technology, as well as be involved in the digital and AMS verification of high-performance digital circuits interfacing to leading edge analog circuitry as part of an overall system.

In this role, your responsibilities will include the following.

  • Develop detailed Verification/Test plans using specifications to cover all the digital/analog functionality/features of a mixed-signal chip for our next generation designs.

  • Develop SystemVerilog chip-level testcases based on the verification plan.

  • Simulation, Testcase debug and Verification closure for the digital/analog functionality of Mixed-signal chips, at chip-level in digital and AMS environment.

  • Finding design bugs with break-the-design mindset and ensuring design is bug-free and robust.

  • Develop SystemVerilog based behavioral models for the analog blocks and integrate them in the chip-level verification environment.

  • Running regressions and DV closure activities.

  • Work closely with design and systems teams to review/close spec gaps and design bugs, as they arise.

  • Design for testability using ad-hoc, Full scan, IDDQ, VBOX, ATPG, BIST

  • Drive documentation, reviews and verification flow improvement strategies.

  • Be proactive in risk assessment and drive solutions to mitigate them.

Why TI?

  • Engineer your future. We empower our employees to truly own their career and development. Come collaborate with some of the smartest people in the world to shape the future of electronics.

  • We're different by design. Diverse backgrounds and perspectives are what push innovation forward and what make TI stronger. We value each and every voice, and look forward to hearing yours. Meet the people of TI (https://edbz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX/pages/4012)

  • Benefits that benefit you. We offer competitive pay and benefits designed to help you and your family live your best life. Your well-being is important to us. Please find our country-specific benefits here (https://careers.ti.com/en/sites/CX/pages/benefits)

About Texas Instruments

Texas Instruments Incorporated (Nasdaq: TXN) is a global semiconductor company that designs, manufactures and sells analog and embedded processing chips for markets such as industrial, automotive, data center, personal electronics and communications equipment. At our core, we have a passion to create a better world by making electronics more affordable through semiconductors. This passion is alive today as each generation of innovation builds upon the last to make our technology more reliable, more affordable and lower power, making it possible for semiconductors to go into electronics everywhere. Learn more at TI.com .

Texas Instruments is an equal opportunity employer and supports a diverse, inclusive work environment. All qualified applicants will receive consideration for employment without regard to race, color, religion, creed, disability, genetic information, national origin, gender, gender identity and expression, age, sexual orientation, marital status, veteran status, or any other characteristic protected by federal, state, or local laws.

If you are interested in this position, please apply to this requisition.

Minimum requirements:

  • Masters degree in Electrical Engineering or related field.

  • 3+ years of related experience.

  • Strong hands on working experience in Digital/AMS verification for Mixed-signal chips.

  • Strong programming skills using SystemVerilog in verification.

  • Robust in verification approach and strong in fundamentals of DV flows and concepts.

  • SystemVerilog and class-based verification knowledge.

Preferred qualifications:

  • Experience in writing an exhaustive verification plan from the specs.

  • Experience in chip-level testcases in SystemVerilog.

  • Experience in metric-based Verification closure using Code and Functional coverage.

  • Experience in random/constrained random verification.

  • Experience with Cadence simulation and debug tools.

  • Experience with UART, SPI, I2C communication protocols.

  • Good in debugging skills.

  • Ability to work independently and self-driven/motivated person.

ECL/GTC Required: Yes

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