
Staff Mixed Signal Verification Engineer
Chandler, AZJobSeen 3w agoSeen in employer's feed 2 days ago
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Job overview
Renesas is seeking a Staff Mixed‑Signal Verification Engineer to lead verification and modeling of power‑management ICs, including PMICs, battery chargers, and switching regulators. The role involves developing verification plans, creating SystemVerilog‑RNM and Verilog‑AMS models, debugging analog‑digital issues, collaborating with design and CAD teams, and interfacing with customers to ensure successful product sign‑off.
Skills & qualifications
Skills
Qualifications
Full job description
Staff Mixed Signal Verification Engineer
Job Description
ob Description
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As a Mixed-Signal Verification Engineer , you will be responsible for the verification and modeling of mixed-signal power management devices, including PMICs, battery chargers, switching regulators, and related analog IP. You will work closely with design, systems, verification, CAD, and customer teams to drive successful development, integration, and sign-off of complex mixed-signal power chips.
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Verification: Lead chip-level verification of analog and mixed-signal circuits using AMS and DMS methodologies, integrating analog behavioral models with digital RTL and UVM-based environments. Develop verification strategies, drive coverage closure, and support product tapeout milestones.
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Modeling: Create, maintain, and validate behavioral models using SystemVerilog RNM and Verilog-AMS, translating circuit and system requirements into high-performance models suitable for both AMS co-simulation and full-chip DMS verification. Ensure model accuracy through correlation against specifications and schematic references across operating conditions.
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Verification Plan Development: Develop and execute comprehensive verification and modeling plans with full traceability from design requirements through coverage closure and tapeout sign-off. Track verification readiness and proactively identify risks to product schedules.
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Debugging: Own debug and root-cause analysis of mixed-signal verification issues, including failing test cases, model inaccuracies, analog-digital interface problems, convergence issues, and simulation performance bottlenecks. Drive resolution across design, modeling, and verification teams.
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Technical Leadership & Collaboration: Partner with analog and digital designers, system architects, verification engineers, and CAD teams to improve modeling accuracy, simulation efficiency, and verification quality. Participate in architecture and design reviews, influencing design decisions to improve verification effectiveness and reduce project risk.
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Design Review & Optimization : Participate in design reviews to evaluate circuit topology and design partitioning from a verification and modeling perspective, recommending architectural choices that simplify behavioral modeling, improve simulation convergence, and reduce verification risk. Support silicon validation and root-cause analysis of complex system-level issues by correlating simulation predictions to bench measurements.
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Documentation: Document verification plans, model validation methodologies, coverage results, and sign-off metrics to ensure clear communication and traceability throughout the product lifecycle.
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Customer Interaction: Interface directly with external customers to present verification status, review coverage results, address technical questions, and ensure verification deliverables meet product and customer requirements.
Qualifications
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Education: B.S. or M.S. in Electrical Engineering, Computer Engineering, or a related field.
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Experience: 8-12+ years of experience in mixed-signal verification, AMS/DMS simulation, behavioral modeling, power management IC development, or related semiconductor design activities. Strong experience with switching regulators, battery chargers, PMICs, SystemVerilog, Verilog-AMS, UVM, Cadence Xcelium, Spectre, and mixed-signal verification sign-off methodologies is highly desirable. Experience developing behavioral models and debugging complex analog-digital interactions is a plus.
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Communication: Strong communication, teamwork, and customer-facing skills, with the ability to effectively collaborate across cross-functional engineering teams and present technical information to both internal and external stakeholders.
Additional Information
Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier . With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future.
At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.
We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.
Are you ready to join our team and shape the future with us?
Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement (https://jobs.renesas.com/diversity-and-inclusion) .
Renesas Electronics deals with dual-use technology that is subject to U.S. export controls regulations. Under these regulations it may be necessary for Renesas to obtain U.S. government export license prior to release of technology to certain persons. The decision whether or not to file or pursue an export license application is at the sole discretion of Renesas.
VideoUrl
https://www.youtube.com/embed/k-zs4tB6nNc
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Department Engineering
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Location Chandler
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Remote No
Requisition ID
20030500_2026-07-11
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