Principal Design Verification Engineer

The candidate for this position will be expected and able to complete the following responsibilities: Own or lead functional or performance verification of one or more aspects of Fabric Top subsystem integration, including coherency, traffic flows to and from memory and PCIe/CXL endpoints, and end-to-end interconnect functionality. Partner with architecture, design, and verification teams to define verification strategies, test plans, and signoff criteria. Develop and enhance UVM and/or Formal verification environments, performance measurement tools, automation infrastructure, and reusable collateral. Drive bug discovery and root-cause analysis through simulation, formal analysis, assertions, coverage, and debug. Improve verification productivity through automation, methodologies, and AI-driven solutions. Coach and mentor engineers in verification methodologies and best practices. Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR equivalent experience. This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate's citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable. Experience of one or more of the following: fabric interconnects, coherency, CHI, AMBA, PCIe, CXL, protocol bridges, or memory subsystems. Experience in architecting and developing UVM verification environments, assertions, checkers, and coverage models. Experience driving IP verification for multiple product cycles from definition to silicon, including writing IP/block or subsystem level test plans, developing tests, debugging failures and coverage signoff Demonstrated hands-on technical leadership such as creating bottom's up schedules, coordinating work across a team, driving verification closure, or solving cross-team technical problems Experience with Formal Verification and assertion-based verification methodologies. Proficiency with Python or similar scripting languages for automation and data analysis. Experience applying AI-assisted tools to engineering and verification workflows.