Senior Principal Verification Engineer

Define and drive the SoC verification architecture, strategy, and methodology for complex multi-IP and multi-subsystem designs. Develop comprehensive verification plans based on architecture, specifications, use cases, and potential system-level failure scenarios. Lead verification of critical SoC functionality including interconnect, coherency, memory, I/O, security, power management, reset, debug, and system-level flows. Drive development of scalable environments, stimulus, checkers, scoreboards, assertions, functional coverage, and verification infrastructure. Identify verification gaps, architectural corner cases, and cross-IP interactions that may not be adequately covered by block- or subsystem-level verification. Partner closely with architecture, RTL design, firmware, performance, emulation, validation, and IP verification teams to ensure end-to-end verification coverage. Lead verification of system-level scenarios, concurrency, stress conditions, error handling, recovery, and complex interactions across multiple subsystems. Influence verification methodology and infrastructure improvements that increase coverage, productivity, scalability, debug efficiency, and quality. Identify verification risks early and drive mitigation plans to protect program quality and schedule. Participate in architecture, design, test-plan, coverage, and verification readiness reviews. Serve as a senior technical authority for SoC DV and help establish verification of best practices and technical direction across projects. Provide technical guidance and mentorship to verification engineers across the organization. Embody our culture and values. Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 7+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 10+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 12+ years technical engineering experience OR equivalent experience. This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate's citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable BS/MS in Electrical Engineering, Computer Engineering, Computer Science or related degree. Minimum of 8+ years acting in a technical lead capacity managing complex cross-functional or cross-geographic silicon verification projects 10+ years of experience of functional verification in complex CPU, SoC, or IP development environments. Demonstrated technical depth in one or more of the following: ARM/CPU architecture Memory subsystem architecture, memory controllers/PHYs, and DDR protocols Coherent/non-coherent fabrics and protocols PCIe/CXL controllers, PHYs, and protocols IOMMU/SMMU, address translation, and virtualization Experienced SystemVerilog/UVM skills and working knowledge of C/C++ and scripting languages. Demonstrated ability to drive complex technical problems across architecture, design, firmware, performance, and verification teams. Experienced communication and collaboration skills, with the ability to provide technical leadership and contribute effectively across diverse, cross-functional teams.