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Firmware Engineer

Hidden Level Inc.

Syracuse, NY · HybridJob$84–90K/yrSeen 2 days agoSeen in employer's feed 1 day ago

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At a glance

Compensation
$84–90K/yr
Location
Syracuse, NYHybrid
Work Authorization
US work authorization required

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Requirements

Credentials this posting asks for.

Security clearanceBachelor's degree

Job overview

Hidden Level seeks a Firmware Design Engineer to develop FPGA‑based solutions for advanced RF sensing systems, designing, simulating, and testing digital logic for data acquisition, signal processing, hardware control, and high‑speed communications while collaborating across engineering teams.

Skills & qualifications

RequiredNice to have

Skills

VHDLVerilogPythonTCLAMD FPGAZynq Ultrascale+EthernetPCIeGitMatlabSimulinkHDL CoderIP IntegratorXilinx System GeneratorDigital Signal ProcessingRadarSensor SystemsRF Front-EndReal-Time ControlCommunication

Qualifications

Bachelor's Degree in Electrical Engineering or Related FieldTravel 10%U.S. CitizenshipAbility to Obtain U.S. Government Security Clearance

Benefits

Medical Insurance
Parental Leave
Paid Time Off
401(k) Match

Full job description

Firmware Design Engineer

At Hidden Level, we’re building the future of airspace awareness through cutting-edge RF sensing technology. Our mission is to make the world safer—whether it’s protecting troops, securing infrastructure, or enabling smarter cities. We design, manufacture, and deploy advanced sensor systems that deliver real-time insights for defense and commercial applications.

Position Overview:

As we expand, we’re looking for a Firmware Design Engineer to develop FPGA-based solutions for Hidden Level’s advanced RF sensing systems. In this role, you will design, simulate, and test digital logic for data acquisition, signal processing, hardware control, and high-speed communications. You will collaborate across engineering teams to develop and integrate solutions for testing in laboratory and field environments.

Location:

We do our best work together! This role is primarily onsite in Syracuse, NY, with some flexibility to work remotely when the role and schedule allow.

Responsibilities:

  • Work in a small, dedicated team passionate about solving challenging problems and delivering results.

  • Collaborate with Software, Systems, Mechanical, and RF engineers to design new and improve existing systems.

  • Participate in collaborative, cross-functional design and code reviews.

  • Aid in the creation and review of requirements and develop solutions to meet design goals.

  • Architect and design digital logic solutions for the latest AMD FPGA and SoC devices such as Zynq Ultrascale+ and Zynq Ultrascale+ RFSoCs.

  • Design and implement HDL components for data acquisition, digital signal processing, command and control, external hardware interfaces, high-speed communication protocols such as Ethernet and PCIe, and more.

  • Perform timing closure and create well-constrained, maintainable solutions that are easily extensible and employ an efficient use of resources.

  • Integrate and test new designs in simulation, lab, and field environments.

  • Use Python, TCL, and other scripting languages to automate and improve workflows.

What We’re Looking For:

  • Strong interest in FPGA development, digital design, and embedded systems.

  • Analytical problem-solving skills and attention to technical detail.

  • Ability to collaborate effectively within a cross-functional engineering team.

  • Curiosity and willingness to learn new tools, technologies, and technical concepts.

  • Strong communication, organization, and time-management skills.

Required Qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or related field

  • Proficiency with VHDL and/or Verilog to configure FPGAs and other embedded systems.

  • Understanding of synchronous digital design, such as finite state machines, pipelining, combinatorial and sequential logic.

  • Ability to create testbenches and use simulation to verify RTL behavior.

  • Ability to travel 10%

Preferred Qualifications:

  • Familiaritywith AMD FPGAs, the Vivadodesign environment and their capabilities

  • Experience writing thorough, self-checking testbenches for automated unit-tests

  • Familiarity with source control, preferably Git.

  • Excellent written and oral communication skills, coupled with the ability to listen, question, and understand stakeholder needs.

  • Experience with or the willingness to learn about:

  • Communication, Radar, and other Sensor systems

  • Real-time control of RF front-end, memories, high-speed interfaces, and other hardware components

  • Matlab, Simulink, HDL Coder, IP Integrator, and Xilinx System Generator

  • Digital Signal Processing, Software Defined Radios, and RF System Design

Compensation and Benefits: Hidden Level offers a competitive salary and a comprehensive benefits package, including health insurance, paid parental leave, flexible time off, 401(k) with employer contributions, life insurance, disability insurance, and potential stock options.

Salary Range: The salary range for this position is estimated at $84,000 to $90,000 annually. Please note that the salary information is a general guideline only. Hidden Level considers factors such as (but not limited to) scope and responsibilities of the position, candidate's work experience, education/ training, key skills as well as market and business considerations when extending an offer.

Equal Opportunity Employer: Hidden Level is an Equal Opportunity Employer. We consider all qualified applicants for employment without regard to race, color, religion, national origin, sex, pregnancy, sexual orientation, gender identity, age, veteran status, disability, or any other status protected by applicable federal, state, or local law.

Security Note: Due to the nature of Hidden Level’s technology, only U.S. citizens can be considered for this position. Hidden Level Employees must be able to obtain and maintain a U.S. Government Security Clearance, if required for the position. Please click here to review the National Security Clearance Adjudicative Guidelines.

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