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Member of Technical Staff — Inference-Multi-Hardware

RadixArk

Palo Alto, CAFull-time$200–400K/yrPosted todayStill listed today

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At a glance

Compensation
$200–400K/yr
Location
Palo Alto, CA
Schedule
Full-time
Work Authorization
Not specified

Olive lists jobs from US employers, including remote roles you can work from the United States.

Job overview

RadixArk seeks a Member of Technical Staff to bring up, optimize, and maintain inference and training systems across NVIDIA and AMD GPUs, Google TPUs, CPUs, and emerging accelerators. The role involves porting kernels and runtimes to unfamiliar hardware, designing portable abstractions, and working with silicon partners on pre-release platforms. The engineer will drive performance across platforms and contribute optimizations and portability work to open-source SGLang and Miles.

Skills & qualifications

RequiredNice to have

Skills

Performance EngineeringNvidia CUDATridentC++ (Programming Language)Python (Programming Language)DebuggingPerformance ProfilingAccelerator Programming ModelsAccelerator ArchitectureHigh-Performance KernelsDistributed ExecutionCommunication LibrariesSystem ProfilingNew Silicon Bring-UpVendor EcosystemsCompiler StacksCompiler PassesIR TransformationsHardware Abstraction LayersPortable Kernel InterfacesQuantizationMixed-Precision ComputingDistributed Inference SystemsTraining FrameworksCPU Inference OptimizationCollective Communication OptimizationKernel Open-Source ContributionsCompiler Open-Source ContributionsML Systems Open-Source ContributionsSilicon Vendor CollaborationCloud Partner CollaborationHPC

Qualifications

4+ Years Systems or Performance EngineeringProduction Performance Work

Full job description

About the Role RadixArk is seeking a Member of Technical Staff - Inference-Multi-Hardware to push the limits of performance for frontier AI systems. Most performance engineering assumes a single vendor's stack. This role assumes none. You'll bring up, optimize, and maintain SGLang, Miles, and the RadixArk infrastructure stack across NVIDIA and AMD GPUs, Google TPUs, modern server CPUs, and a growing set of emerging AI accelerators. That means porting kernels and runtimes onto unfamiliar hardware, designing the abstractions that keep one codebase fast on all of it. You will be working directly with silicon and our partners, often on pre-release platforms with immature tooling. This is one of the broadest technical roles at RadixArk. The problem changes shape with every new platform: a memory hierarchy that punishes your last set of assumptions, a compiler that fuses differently, a collective library that doesn't exist yet. We're looking for engineers who find that appealing rather than exhausting, and who can go deep on a new architecture fast without losing the performance instincts they built on the last one. Requirements

  • 4+ years of experience in systems, performance, or ML infrastructure engineering

  • Deep expertise in at least one accelerator programming model (CUDA, ROCm/HIP, Pallas/XLA, Triton, or a vendor SDK), with demonstrated ability to pick up new ones quickly.

  • Strong understanding of accelerator architecture: memory hierarchy, bandwidth limits, occupancy, and the tradeoffs between them

  • Experience writing or optimizing high-performance kernels for ML workloads

  • Experience with distributed execution and communication libraries (NCCL, RCCL, MPI, or equivalents)

  • Proficiency in C++ and Python

  • Strong debugging and profiling skills at the system level, including on platforms where the tooling is incomplete or unreliable

  • Track record of performance work that shipped into production

Strong Plus

  • Experience bringing up ML workloads on new silicon.

  • Hands-on depth in more than one vendor ecosystem

  • Experience with compiler stacks (XLA, MLIR, TVM, Triton) or building compiler passes and IR transformations

  • Experience designing hardware abstraction layers or portable kernel interfaces

  • Quantization and mixed-precision work across differing numeric formats and hardware support levels

  • Experience with distributed inference systems (SGLang, vLLM) or training/RL frameworks (Miles, Megatron, veRL, TorchTitan)

  • CPU inference optimization (AVX-512/AMX, oneDNN, NUMA-aware execution)

  • Experience optimizing collective communication at scale, or scaling workloads to 1000+ accelerators

  • Contributions to kernel, compiler, or ML systems open source

  • Direct collaboration with silicon vendors or cloud partners on technical evaluations

  • Background in HPC or other performance-critical systems

Responsibilities

  • Bring up RadixArk's inference and training systems on new accelerator platforms and drive them to competitive performance

  • Design hardware abstractions that let a single codebase stay fast across vendors without forking

  • Port and optimize kernels across programming models and memory architectures

  • Build cross-platform benchmarking, profiling, and regression detection so performance claims hold up on every target

  • Debug numerical divergence and correctness gaps between platforms

  • Work with vendor engineering teams on pre-release hardware, compiler and driver issues, and roadmap feedback

  • Partner with kernel, runtime, distributed systems, and product engineers to land performance wins end to end

  • Serve as the internal source of truth on what each platform is actually good at

  • Contribute hardware-specific optimizations, benchmarks, and portability work back to open-source SGLang and Miles

About RadixArk RadixArk is an infrastructure-first company built by engineers who've shipped production AI systems, created SGLang (30K+ GitHub stars, the fastest open LLM serving engine), and developed Miles (our large-scale RL framework). We're on a mission to democratize frontier-level AI infrastructure by building world-class open systems for inference and training. Our team has optimized kernels serving billions of tokens daily, designed distributed training systems coordinating 10,000+ GPUs, and contributed to infrastructure that powers leading AI companies and research labs. We're backed by well-known infrastructure investors and partner with Nvidia, Google, and frontier AI labs. Join us in building infrastructure that gives real leverage back to the AI community. Compensation Depending on background, skills, and experience, the expected annual salary range for this position is $200,000 - $400,000 USD + equity. Equal Opportunity RadixArk is an Equal Opportunity Employer and is proud to offer equal employment opportunity to everyone regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity, veteran status, and more.

How this job compares

Set against the 11,799 open Systems Engineer jobs on Olive Jobs, counted November 8, 2026.

Pay
  • This posting$200–400K/yr
  • California median$145–213K/yr1,795 salary ranges
  • US median$115–190K/yr8,836 salary ranges

This range's midpoint, $300K, is 69% above the California median midpoint ($178K) — in the top quarter of Systems Engineer salary ranges in California.

Openings
Olive Jobs lists 2,091 open Systems Engineer jobs in California and 11,799 across the US. 5% of them nationwide are listed as remote or flexible.
Hiring the most in California
Experience
This posting asks for at least 4 years of experience; Systems Engineer postings that state a minimum ask for 5 years at the median (9,716 postings).
Education
4,396 of the 11,799 open Systems Engineer jobs (37%) ask for a bachelor's degree or higher.

Counted across the open, public US postings on Olive Jobs on November 8, 2026. Pay medians are the middle values of the low ends and of the high ends of postings that list both ends of a range in the same cadence (a yearly salary or an hourly rate); a range's midpoint is halfway between its ends. Pay and experience figures resting on fewer than 20 postings are left out.

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