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Physical Design Methodology CAD Engineer

Apple

Cupertino, CAFull-timeSeen 5 days agoSeen in employer's feed 5 days ago

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At a glance

Compensation
No compensation found
Location
Cupertino, CA
Schedule
Full-time
Work Authorization
Not specified

Olive lists jobs from US employers, including remote roles you can work from the United States.

Requirements

Credentials this posting asks for.

Bachelor's degree

Job overview

As part of Apple’s Hardware Technology CAD team, the Physical Design Methodology CAD Engineer develops flows, tools, and methodologies for next-generation SoCs. The role supports CPU, GPU, analog/mixed-signal, and SoC designs, enables new technology nodes, and collaborates with design teams and EDA vendors to improve power, performance, area, and productivity. It also develops internal methodologies and GenAI applications for design teams.

Skills & qualifications

RequiredNice to have

Skills

TclPythonPerlVLSIPhysical DesignCAD ToolsCAD FlowsPD MethodologyExtraction AnalysisTiming AnalysisNoise AnalysisPhysical VerificationEMIR Analysis

Qualifications

BS

Full job description

Weekly Hours: 40

Role Number: 200692170-0836

Summary

Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, you and your team will enable our customers to do all the things they love with their devices.

As part of the Hardware Technology CAD team, you’ll help design our next-generation, high-performance, power-efficient SoCs. You will work on world class CPU, GPU, Analog/Mixed Signal and SOC designs by developing flows, tools and methodologies for future Apple products! You will explore and enable new technology nodes, stdcells and tools for design teams. You will collaborate with design teams and tool vendors to improve PPA (Power, Performance, Area) and design productivity. You will use and leverage GenAI tools to develop GenAI applications to improve Design team productivity. You will actively work on developing internal methodologies using your understanding of CAD algorithms and ML. We are looking for passionate engineers to join our team. In this role, you will be impacting a wide range of chips used across Apple’s world-class products!

Description

  • Participating and engaging with cross functional teams to tackle key physical design challenges.

  • Developing innovative solutions in physical design and optimization space.

  • Developing and supporting implementation flows for multiple projects and design teams.

  • Developing and maintaining custom CAD tools for implementation and signoff.

  • Creating flows to enable successful deployment of new technology nodes.

  • Developing tools and methodologies for best-in-class PPA and productivity including ML based solutions.

  • Use and leverage GenAI tools to develop GenAI applications to improve Design team productivity.

  • Collaborating with other teams such as physical design verification, RC extraction, IR and static timing analysis (STA).

  • Working directly with EDA tool vendors to resolve tool issues and identify areas for tool improvements.

Minimum Qualifications

  • Knowledge of Tcl, Python or Perl scripting languages

  • Minimum requirement of BS

Preferred Qualifications

  • Good understanding of VLSI / Physical Design basics through previous coursework or internships

  • Exposure to CAD Tool, CAD flow or PD methodology.

  • Understanding of some of the analysis involved in Physical Design - extraction, timing, noise, physical verification, EMIR.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.

How this job compares

Set against the 2,934 open Hardware Engineer jobs on Olive Jobs, counted November 3, 2026.

Pay
  • This postingNot listed
  • California median$146–214K/yr894 salary ranges
  • California median$52–65/hr22 hourly ranges
Openings
Olive Jobs lists 1,194 open Hardware Engineer jobs in California and 2,934 across the US. 1% of them nationwide are listed as remote or flexible.
Hiring the most in California
Experience
Hardware Engineer postings that state a minimum ask for 5 years of experience at the median; the middle half ask for 3 to 8 years (2,455 postings).
Education
This posting asks for a bachelor's degree; 1,748 of the 2,934 open Hardware Engineer jobs (60%) ask for a bachelor's degree or higher.

Counted across the open, public US postings on Olive Jobs on November 3, 2026. Pay medians are the middle values of the low ends and of the high ends of postings that list both ends of a range in the same cadence (a yearly salary or an hourly rate); a range's midpoint is halfway between its ends. Pay and experience figures resting on fewer than 20 postings are left out.

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