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Design Verification Engineer - Physical AI Compute

Auradine

Santa Clara, CAJob$75–275K/yrPosted 2w agoVerified open 3 days ago

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At a glance

Compensation
$75–275K/yr
Location
Santa Clara, CA
Work Authorization
Not specified

Job overview

Auradine is hiring a Design Verification Engineer - Physical AI Compute. Auradine seeks Design Verification Engineers to verify and deliver Velaura’s next‑generation Physical AI SoC, collaborating with architects, RTL, software and system teams to ensure correctness, performance, reliability and safety across hardware blocks and system‑level behavior.

Key focus areas include Develop and execute verification strategies for key portions of the SoC., Build verification environments using SystemVerilog, UVM, C/C++, assertions and formal methods., and Collaborate with architects and RTL engineers to define verification plans and coverage goals..

Important skills include Design Verification, Formal Verification, Debugging, Digital Design, Performance Modeling, and Collaboration. Preferred (not required): ISO 26262, IEC 61508, IEC 61511, and ISO 13849.

Skills & qualifications

RequiredNice to have

Skills

Design VerificationFormal VerificationDebuggingDigital DesignPerformance ModelingCollaborationProblem SolvingReal Time SystemsVerilogUVMC/C++AssertionsEmulationFPGA PrototypingAI-Assisted Verification WorkflowsCoverage-Driven VerificationStrong Analytical and Problem-Solving SkillsComputer ArchitectureMicroarchitectureSoC ArchitectureDigital Design FundamentalsMemory SystemsInterconnect FabricsDMA EnginesCollaborative Multidisciplinary EngineeringISO 26262IEC 61508IEC 61511ISO 13849Artificial IntelligenceMachine LearningEdge AI HardwareRoboticsDronesAutonomous VehiclesIndustrial Automation SystemsQoS VerificationLatency-Sensitive SystemsProfilingWorkload CharacterizationCPUsGPUsAI AcceleratorsNetworking and Communications SiliconStorage and Data Movement ArchitecturesAutomotive and ADAS PlatformsAerospace and Defense SystemsFunctional Safety Architectures

Qualifications

Experience Verifying Complex Digital SystemsExperience With SystemVerilog UVM C/C++ Assertions Coverage-Driven VerificationFamiliarity With Formal Verification Techniques and ToolsExperience Debugging Complex System-Level IssuesExperience With One or More of the Following Standards ISO 26262 IEC 61508 IEC 61511 ISO 13849Experience With AI Machine Learning or Edge AI HardwareFamiliarity With Robotics Drones Autonomous Vehicles or Industrial Automation SystemsExperience Verifying QoS Latency-Sensitive or Real-Time SystemsExperience With HW/SW Co-Verification and System-Level ValidationExposure to Performance Modeling Profiling and Workload CharacterizationBackground in CPUs GPUs AI Accelerators Networking Communications Silicon Storage Data Movement Architectures Automotive ADAS Aerospace Defense Real-Time Safety-Critical Computing Functional Safety Architectures

Benefits

Medical Insurance
Dental Insurance
Vision Insurance
Paid Time Off

Full job description

Role Overview We are looking for talented Design Verification Engineers to help verify and deliver Velaura’s next-generation Physical AI SoC. In this role, you will work closely with architects, RTL engineers, software engineers, and system teams to verify complex hardware blocks and system-level behavior across the entire platform.You will help establish confidence in the correctness, performance, reliability, and safety of the architecture—from individual RTL blocks to complete HW/SW systems running real-world workloads. We welcome engineers at all experience levels who enjoy understanding systems, finding corner cases, and solving challenging technical problems. Responsibilities ● Develop and execute verification strategies for key portions of the Velaura SoC.

  • Build verification environments using SystemVerilog, UVM, C/C++, assertions, formal verification, emulation, and related methodologies.

  • Collaborate with architects and RTL engineers to define verification plans, coverage goals, and correctness criteria.

  • Verify compute engines, memory subsystems, interconnect fabrics, control processors, DMA engines, and other critical SoC infrastructure.

  • Perform HW/SW co-verification involving firmware, drivers, runtime software, and operating system interactions.

  • Verify performance, latency, bandwidth, QoS, and real-time system behavior under representative workloads.

  • Develop assertions, checkers, scoreboards, and automated verification infrastructure.

  • Participate in emulation, FPGA prototyping, and pre-silicon software bring-up activities.

  • Drive bug investigation, root-cause analysis, and debug across hardware and software boundaries.

  • Post-silicon debug and root cause analysis.

  • Leverage modern engineering tools, including AI-assisted verification workflows, to improve productivity, quality, and coverage.

  • Contribute to a culture of technical excellence and continuous improvement.

Required Qualifications ● Experience verifying complex digital systems.

  • Strong analytical and problem-solving skills.

  • Strong understanding of computer architecture, microarchitecture, SoC architecture and digital design fundamentals.

  • Experience with SystemVerilog, UVM, C/C++, assertions, coverage-driven verification, and related methodologies.

  • Familiarity with formal verification techniques and tools.

  • Understanding of memory systems, interconnect fabrics, caches, DMA engines, processors, or accelerator architectures.

  • Experience debugging complex system-level issues.

  • Ability to work effectively in a collaborative, multidisciplinary engineering environment.

Preferred Qualifications ● Experience with one or more of the following standards: ISO 26262, IEC 61508, IEC 61511, ISO 13849

  • Experience with AI, machine learning, or edge AI hardware.

  • Familiarity with robotics, drones, autonomous vehicles, or industrial automation systems.

  • Experience verifying QoS, latency-sensitive, or real-time systems.

  • Experience with HW/SW co-verification and system-level validation.

  • Exposure to performance modeling, profiling, and workload characterization.

  • Experience using modern AI tools and workflows to accelerate engineering productivity.

  • Background in CPUs, GPUs, AI accelerators, networking and communications silicon, storage and data movement architectures, robotics and autonomous systems, automotive and ADAS platforms, aerospace and defense systems, real-time and safety-critical computing, or functional safety architectures and methodologies.

Why Velaura? Velaura is building next-generation compute technology for cloud, edge, and Physical AI. Our solutions will enable robots, autonomous systems, drones, and other intelligent machines to operate efficiently in the physical world. This is an opportunity to help build foundational technology at a time when the industry is undergoing fundamental change. You will work alongside experienced leaders, architects, engineers, and operators who have delivered industry-defining products across mobile, cloud, semiconductor, and AI platforms. If you enjoy solving difficult problems, working across disciplines, and helping shape the future of Physical AI, we would love to hear from you.

Equal Employment Opportunity and Accommodations Velaura is an Equal Opportunity Employer that is committed to inclusion and diversity. Qualified applicants will receive consideration for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, disability or protected veteran status. We also take affirmative action to offer employment opportunities to minorities, women, individuals with disabilities, and protected veterans.

Velaura is committed to working with qualified individuals with physical or mental disabilities. Applicants who would like to contact us regarding the accessibility of our website or who need special assistance or a reasonable accommodation for any part of the application or hiring process may contact us at: [email protected]. This contact information is for accommodation requests only. Evaluation of requests for reasonable accommodation will be determined on a case-by-case basis.

75000 - 275000 USD a year

Compensation & Benefits At Velaura, we believe exceptional talent deserves exceptional rewards. Compensation for this role includes a competitive base salary, performance-based incentives, and equity participation, allowing team members to share in the company’s long-term success.

Your base pay will depend on your skills, qualifications, experience, and location.

In addition to compensation, Velaura offers a comprehensive benefits package that may include medical, dental, and vision coverage; paid time off; flexible work arrangements; professional development opportunities; and other benefits designed to support the well-being and growth of our team.

Velaura is committed to pay equity and transparency and regularly benchmarks compensation to ensure we remain competitive in the market.

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