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Senior Hardware Emulation Engineer, Google

Google

Sunnyvale, CAJob$163–236K/yrSeen 3w agoSeen in employer's feed 1 day ago

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At a glance

Compensation
$163–236K/yr
Location
Sunnyvale, CA
Work Authorization
Not specified

Olive lists jobs from US employers, including remote roles you can work from the United States.

Job overview

The Senior Hardware Emulation Engineer will develop and maintain emulation infrastructure, tools, and workflows supporting ASIC projects. The role compiles complex projects, brings up high-speed interfaces, and debugs design and infrastructure issues. It also supports pre-silicon and lab bring-up and validation, collaborating with emulation, design, verification, firmware, and software teams on Google TPU hardware.

Skills & qualifications

RequiredNice to have

Skills

Hardware EmulationModel CompilationRuntime OptimizationMethodology EnhancementVerilog/SystemVerilogC/C++PythonPerl/TCL ScriptingCI/CD AutomationHigh-Speed Protocol DebuggingWaveform ToolsVendor Issue TriageEmulation Throughput MeasurementSoC Project ExperienceEmulation Testbench ArchitectureTransactorsAccelerated VIPsSpeed BridgesHybrid/Virtual Host PlatformsIn-Circuit Emulation

Qualifications

Bachelor's in Electrical Engineering, Computer Engineering, Related Field, or Equivalent Experience8 Years Hardware Emulation ExperienceMaster's or PhD in Electrical Engineering, Computer Engineering, or Computer Science3+ SoC Projects or Tapeout Cycles

Full job description

Senior Hardware Emulation Engineer, Google

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Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area.

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XIn most instances, this position requires in-person interviews as part of the hiring process.

Minimum qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Engineering, a related field, or equivalent practical experience.

  • 8 years of experience with hardware emulation systems (e.g., Palladium, ZeBu, Veloce), model compilation, runtime performance optimization, and methodology enhancements.

  • Experience with Verilog/SystemVerilog, C/C++, Python or Perl/TCL scripting, CI/CD automation, and debugging high-speed protocols (e.g., PCIe, HBM, DDR5, UCIe, Ethernet) using waveform tools (e.g., Verdi, SimVision/Indago, GDB).

  • Experience interfacing with emulation EDA vendors and internal infrastructure teams to triage compiler, tool, and platform issues and guage emulation throughput.

Preferred qualifications:

  • Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.

  • Experience across three or more SoC projects/tapeout cycles.

  • Experience architecting and bringing up advanced emulation testbench environments (e.g., Transactors/Accelerated VIPs, SpeedBridges/Speed Adapters, Hybrid/Virtual Host platforms, and In-Circuit Emulation).

About the job

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

In this role, you will help develop and maintain emulation infrastructure, tools, and workflow methodologies supporting ASIC projects.You will help create ASICs representing a significant investment in time and money, and a successful prototyping campaign helps to ensure success of these critical projects. However, as designs continue to increase in size and complexity, emulation becomes even more important in meeting verification and bring-up milestones. You will provide excellent emulation infrastructure and methodologies essential to support these projects.

You will work directly with other emulation team members as well as designers, verification engineers, and software teams. You will compile complex projects targeting our platforms, bring up high-speed interfaces, debug issues across design and infrastructure, and help drive pre-silicon and lab bring-up and validation of our ASIC systems.

The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

We're behind Google's groundbreaking innovations, empowering the development of AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.Individual pay is determined by factors including job-related skills, experience, and relevant education or training.

US: $163000 - $236000 (USD) + 15% bonus target + equity + benefits

Learn more aboutbenefits at Google (https://www.google.com/about/careers/applications/benefits/) .

Responsibilities

  • Build, compile, and debug full-chip and multi-die System-on-Chip (SoC) RTL models and tests on hardware emulation platforms.

  • Bring up external interfaces (e.g., PCIe, HBM, DDR5, UCIe, Ethernet, USB) on emulation platforms using transactors, Accelerated VIPs, and speed bridges.

  • Explore verification and emulation methodologies, gather feedback and implement new emulation workflows and CI/CD automation.

  • Partner with firmware, system software, and post-silicon validation teams to drive pre-silicon hardware/software co-verification, shift-left software bring-up, and silicon bug reproduction on emulation.

  • Support emulation and software team members in debugging hardware, tooling, compile, and runtime issues, and act as a technical interface to emulation vendors.

Information collected and processed as part of your Google Careers profile, and any job applications you choose to submit is subject to Google'sApplicant and Candidate Privacy Policy (./privacy-policy) .

Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law. See alsoGoogle's EEO Policy (https://www.google.com/about/careers/applications/eeo/) ,Know your rights: workplace discrimination is illegal (https://careers.google.com/jobs/dist/legal/EEOC\_KnowYourRights\_10\_20.pdf) ,Belonging at Google (https://about.google/belonging/) , andHow we hire (https://careers.google.com/how-we-hire/) .

If you have a need that requires accommodation, please let us know by completing ourAccommodations for Applicants form (https://goo.gl/forms/aBt6Pu71i1kzpLHe2) .

Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.

To all recruitment agencies: Google does not accept agency resumes. Please do not forward resumes to our jobs alias, Google employees, or any other organization location. Google is not responsible for any fees related to unsolicited resumes.

Equity is granted exclusively and discretionarily by Alphabet Inc. on the basis of an agreement concluded between you and Alphabet Inc. Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not guaranteed, are discretionary, are subject to approval by the Alphabet Inc. board of directors or its delegate, the terms of the relevant Alphabet Inc. stock plan, and your grant agreement. They have no impact on statutory payments. Current or past grants do not confer an acquired right.

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also https://careers.google.com/eeo/ and https://careers.google.com/jobs/dist/legal/OFCCP_EEO_Post.pdf If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form: https://goo.gl/forms/aBt6Pu71i1kzpLHe2.

How this job compares

Set against the 3,060 open Hardware Engineer jobs on Olive Jobs, counted November 6, 2026.

Pay
  • This posting$163–236K/yr
  • California median$145–214K/yr950 salary ranges
  • US median$132–204K/yr2,272 salary ranges

This range's midpoint, $200K, is 12% above the California median midpoint ($178K) — in the middle half of Hardware Engineer salary ranges in California.

Openings
Olive Jobs lists 1,251 open Hardware Engineer jobs in California and 3,060 across the US. 1% of them nationwide are listed as remote or flexible.
Hiring the most in California
Experience
This posting asks for at least 8 years of experience; Hardware Engineer postings that state a minimum ask for 5 years at the median (2,588 postings).
Education
1,740 of the 3,060 open Hardware Engineer jobs (57%) ask for a bachelor's degree or higher.

Counted across the open, public US postings on Olive Jobs on November 6, 2026. Pay medians are the middle values of the low ends and of the high ends of postings that list both ends of a range in the same cadence (a yearly salary or an hourly rate); a range's midpoint is halfway between its ends. Pay and experience figures resting on fewer than 20 postings are left out.

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