STA Engineer
Multiple U.S. locationsJobSeen 1 day agoSeen in employer's feed 1 day ago
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Job overview
Apple seeks an ASIC STA Engineer to lead full-chip and block-level timing closure throughout project lifecycles and develop timing verification and closure methodologies. The engineer will generate timing constraints and collaborate with multiple SoC teams to resolve complex timing issues for major building blocks. The work involves Apple SoC chips in deep sub-micron technologies for high-end mobile applications.
Skills & qualifications
Skills
Qualifications
Full job description
Role Number: 200657260-0505
Summary
Imagine what you could do here at Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next phenomenal Apple product. Do you enjoy working on challenges that no one has solved yet? As a member of our dynamic group, you will get the unrivaled and rewarding opportunity to craft upcoming products that will delight and encourage millions of Apple’s customers every single day. Are you ready to join a team transforming hardware technology? We are searching for a hardworking engineer to join our exciting team of problem solvers.
Come join our team and be responsible for leading edge IP development and coordinating with multiple SOC teams. In this role, you will work collaboratively with various SOC teams to execute design and integration tasks for the high quality IP deliverables.
Description
As an ASIC STA Engineer, you will have responsibilities spanning various aspects of SOC design: Full chip and block level timing closure ownership throughout the entire project. Develop and maintain methodology and flows related to timing verification and closure. Generation of block and full chip timing constraints. Work on Apple SoC (System-on-Silicon) chips in deep sub-micron technologies targeted for high end mobile applications. Work closely with various multi-functional teams on resolving complex timing issues for major building blocks of complex SoCs.
Minimum Qualifications
- Bachelors Degree + 3 Years of Experience.
Preferred Qualifications
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Strong fundamentals in the area of Digital design
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Self-starter and highly motivated
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Proficient in scripting languages (TCL and Perl)
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Familiarity with ASIC design timing concepts
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Exposure in STA tools (Primetime) is a plus
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Familiarity with front end tools and methodologies such as Synthesis, Logic equivalence checks
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Familiarity in Constraint analysis and debug, using industry standard tools such as Synopsys GCA (Galaxy Constraint Analyzer) is desirable but not required
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Knowledge of timing corners/modes, process variations and signal integrity related issues is a plus
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Ability to commnicate optimally across all internal groups
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
How this job compares
Set against the 3,155 open Hardware Engineer jobs on Olive Jobs, counted November 7, 2026.
- Pay
- This postingNot listed
- Oregon median$146–252K/yr38 salary ranges
- US median$60–69/hr83 hourly ranges
- Openings
- Olive Jobs lists 63 open Hardware Engineer jobs in Oregon and 3,155 across the US. Under 1% of them nationwide are listed as remote or flexible.
- Experience
- This posting asks for at least 3 years of experience; Hardware Engineer postings that state a minimum ask for 5 years at the median (2,635 postings).
- Education
- This posting asks for a bachelor's degree; 1,752 of the 3,155 open Hardware Engineer jobs (56%) ask for a bachelor's degree or higher.
Counted across the open, public US postings on Olive Jobs on November 7, 2026. Pay medians are the middle values of the low ends and of the high ends of postings that list both ends of a range in the same cadence (a yearly salary or an hourly rate); a range's midpoint is halfway between its ends. Pay and experience figures resting on fewer than 20 postings are left out.
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