Design Verification
Multiple U.S. locationsFull-timeSeen 1 day agoSeen in employer's feed 1 day ago
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Job overview
Apple seeks a Design Verification professional in Beaverton, Oregon, to ensure the quality of SoCs, IP, or subsystems. The role collaborates across product disciplines and with design, architecture, and software teams to understand functional and performance goals, develop verification plans and test benches, run and triage regressions, track bugs, and analyze coverage.
Skills & qualifications
Skills
Qualifications
Full job description
Weekly Hours: 40
Role Number: 200691595-0505
Summary
Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.
Description
APPLE INC has the following available in Beaverton, Oregon. Collaborating with all disciplines (vertical product model). Ensuring the quality of the SOC or an IP or subsystem. Reviewing design and architecture specifications and working closely with design & micro-architecture teams. Understanding the functional and performance goals of the design and use this knowledge to test effectively. Developing test plans, tests & coverage plans as well as define Apple’s next generation verification methodology & test benches. Communicating and collaborating with design, architecture and software to understand the use cases and corner conditions and driving test cases. Running and triaging regressions, tracking bugs, and analyzing coverage to achieve top results. 40 hours/week.
Minimum Qualifications
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Master’s Degree or foreign equivalent in Computer Engineering, Electrical Engineering or related field.
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Experience and/or education must include:
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Utilizing System Verilog and UVM framework to write test bench code
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Creating test plans using constrained random verification (CRV) or directed testing to verify ASICs
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Utilizing C to write microprocessor tests for ASIC/Embedded tests.
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Reviewing design and architecture specifications and working closely with design and micro-architecture teams to understand functional and performance goals
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Developing test coverage plan, collecting test bench coverage, and resolving coverage gaps in ASIC test suite
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Implementing IP block test environments and test cases for ASICs
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Utilizing Xcelium, Questa, or VCS to analyze simulation failures
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Programming scripts in Python or Perl to automate test bench analysis
Preferred Qualifications
- N/A
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
How this job compares
Set against the 1,086 open Hardware Engineering jobs on Olive Jobs, counted November 7, 2026.
- Pay
- This postingNot listed
- US median$146–243K/yr767 salary ranges
- US median$35–43/hr92 hourly ranges
- Openings
- Olive Jobs lists 25 open Hardware Engineering jobs in Oregon and 1,086 across the US. Under 1% of them nationwide are listed as remote or flexible.
- Experience
- Hardware Engineering postings that state a minimum ask for 7 years of experience at the median; the middle half ask for 3 to 10 years (673 postings).
- Education
- 360 of the 1,086 open Hardware Engineering jobs (33%) ask for a bachelor's degree or higher.
Counted across the open, public US postings on Olive Jobs on November 7, 2026. Pay medians are the middle values of the low ends and of the high ends of postings that list both ends of a range in the same cadence (a yearly salary or an hourly rate); a range's midpoint is halfway between its ends. Pay and experience figures resting on fewer than 20 postings are left out.
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