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Senior Design Verification Engineer

Cognichip Inc.

Redwood City, CAJobPosted 5mo agoStill listed 4 days ago

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At a glance

Compensation
No compensation found
Location
Redwood City, CA
Work Authorization
Not specified

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Job overview

Cognichip seeks a Senior Design Verification Engineer to blend verification expertise with AI/ML collaboration, turning research ideas into production-grade chip verification tools and improving workflows, data pipelines, and infrastructure.

Skills & qualifications

RequiredNice to have

Skills

Design VerificationCollaborationData PipelineVerification MethodologiesTestbench DevelopmentEDA ToolsPythonC++AI/MLData Pipelines

Qualifications

5+ Years ExperienceVerification Domain KnowledgeEDA Tools ExperienceSoftware Proficiency in Python C++AI/ML ExposureBS MS or PhD in Electrical Engineering Computer Engineering Computer Science or Related FieldAutomated Agentic Workflow ExperienceComputer Architecture BackgroundOpen Source Hardware or AI Contributions

Full job description

Job Title Senior Design Verification Engineer About Cognichip - At Cognichip, we are building AI-native tools that transform how semiconductor engineers create, verify, and optimize chips. - Our platform combines large proprietary models, agentic workflows, domain-specific engineering intelligence, and high-performance simulation infrastructure to accelerate one of the world's most complex engineering disciplines. About the Role - We are seeking a Senior Design Verification Engineer who can combine strong verification expertise with applied AI/ML collaboration to help build production-grade tools for chip verification. - In this role, you will help turn advanced research ideas into practical workflows used by engineers verifying real silicon. - This work matters because verification is one of the biggest bottlenecks in modern chip design, and AI-native systems can meaningfully change the speed, quality, and scale of verification work. Key Responsibilities - Bridge Hardware and Software: Translate verification domain expertise into clear requirements that inform tool development and model behavior. - Support Data Pipelines: Contribute to workflows that generate synthetic or augmented verification code and testbenches, creating the datasets needed to train and evaluate AI models. - Workflow Optimization: Help refine automated workflows for verification-related tasks such as test planning, coverage analysis, and bug triage. - Infrastructure Support: Build and maintain simulation and testing infrastructure to validate AI-generated verification artifacts. - Collaboration: Work closely with AI researchers, software engineers, and other hardware engineers to ensure verification requirements are accurately reflected in tools and models. Required Qualifications - Experience: 5–8+ years of experience in design verification or hardware-focused software development. - Verification Domain: Strong understanding of verification methodologies and testbench development for digital designs. - EDA Tools: Practical experience with industry-standard simulation and verification tools. - Software Proficiency: Solid programming skills in Python, C++, or similar languages. - AI/ML Exposure: Interest in or exposure to LLMs, prompt engineering, or machine learning frameworks applied to technical domains (prior hands-on ML experience is a plus, not required). - Education: BS, MS, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field. Preferred Qualifications - Experience contributing to or building automated/agentic workflows for engineering tasks. - Background in computer architecture, particularly for AI accelerators or high-performance computing. - Contributions to open-source hardware or AI projects. What It's Like Here - We're a fast-moving AI startup with a collaborative, high-trust culture. - We value technical excellence, ownership, and the freedom to experiment. - Our best work happens when our builders and innovators work closely together to turn ambitious ideas into category-defining products. - We operate on a hybrid schedule with four days in office, one day remote. - If you're excited to build tools that empower semiconductor engineers and reshape how chips are verified, you'll feel right at home.

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