XWING logo

Senior FPGA/DSP Engineer

XWING

Santa Cruz, CAFull-time$133–199K/yrPosted 4mo agoVerified open 6 days ago

Most applications go out cold — see where you stand first. No sign-up to start.

At a glance

Compensation
$133–199K/yr
Location
Santa Cruz, CA
Schedule
Full-time
Work Authorization
Not specified

Requirements

Credentials this posting asks for.

Master's degree

Job overview

XWING is hiring a Senior FPGA/DSP Engineer. The successful candidate will play a crucial role in building and optimizing dependable sensing and computing systems for urban air mobility, collaborating with hardware, motor control, software, data, safety, and systems engineers to design, verify, and certify fault‑tolerant FPGA‑based DSP blocks for the aircraft.

Key focus areas include Work with FPGA, hardware, motor control, software, data, safety, and systems engineers to understand DSP and processing needs, Design new and optimize existing fault‑tolerant FPGA‑based DSP blocks for sensor acquisition, motor control, navigation, and hardware emulation, and Develop directed testbenches for DSP blocks based on bit‑accurate reference models and assist verification engineers.

Successful candidates bring B.S. In Electrical Engineering, M.S. In Electrical Engineering, and Ph.D. In Electrical Engineering. Important skills include FPGA, ASIC Design, Verilog, MATLAB, Simulink, and Python. Preferred (not required): DO-254 FPGA Compliance, SEU Mitigation, Embedded Processing Systems, and Processor Architecture.

Skills & qualifications

RequiredNice to have

Skills

FPGAASIC DesignVerilogMATLABSimulinkPythonCSignal Processing Systems ModelingFixed-Point DSP BlocksRTLIIR FiltersFIR FiltersPWM GeneratorsDelta-Sigma ModulatorsPLLsDFT/FFT ProcessorsCORDIC ProcessorsLinux EnvironmentDO-254 FPGA ComplianceSEU MitigationEmbedded Processing SystemsProcessor ArchitectureAXIDMAI2CUARTSPISENTEthernetXilinx FPGAsZynqArtixVivado ToolchainComplex Timing ConstraintsModel-Based DesignAutomated Code Generation ToolsModeling Signal Processing Systems

Qualifications

Bachelor's in Electrical Engineering or Computer Science or Computer Engineering or Mechatronics or Physics or Mathematics or Portfolio of Designed and Utilized FPGA/ASIC Projects5+ Years FPGA or ASIC Design Experience

Benefits

Paid Time Off
Medical Insurance
401(k) Match
Dental Insurance
Vision Insurance
Parental Leave
Tuition Assistance
Relocation Assistance

Full job description

Senior FPGA/DSP Engineer Job Locations US-CA-Santa Cruz ID 2026-4871 Category Software Type Regular Full-Time Company Overview Imagine a piloted air taxi that takes off vertically, then quietly carries you and your fellow passengers over the congested city streets below, enabling you to spend more time with the people and places that matter most. At Joby, we've been working to make that dream a reality since 2009 and we're now in the final stages of certifying our aircraft with the FAA. With plans to launch our aircraft in the US and Dubai, we're now scaling manufacturing and preparing for the launch of our commercial service.

Overview The successful candidate will play a crucial role in building and optimizing the dependable sensing and computing systems needed to bring the dream of Urban Air Mobility to market. They will contribute to a team that is focused on implementing signal processing and algorithm accelerators in a combination of hardware and software. The successful candidate will excel in a highly collaborative environment to design and modify processing systems that can be rigorously defined, designed, characterized, and verified, ensuring the safe operation of our aircraft.

Responsibilities

  • Work with FPGA, hardware, motor control, software, data, safety, and systems engineers to understand current and future DSP and processing needs, constraints, and challenges.
  • Design new and optimize existing fault-tolerant FPGA-based DSP blocks for sensor acquisition, motor control, navigation, and hardware emulation applications.
  • Develop directed testbenches for DSP blocks based on bit-accurate reference models and assist FPGA verification engineers as needed for more formal verification.
  • Work in a rigorous aircraft certification-focused development environment and create the required models and documentation for the definition, validation, and verification of requirements as needed. Required
  • S./M.S./Ph.D. in relevant discipline (Electrical Engineering, Computer Science, Computer Engineering, Mechatronics, Physics, Mathematics, or similar field; or portfolio of designed and utilized FPGA/ASIC projects).
  • 5+ years’ experience in FPGA or ASIC design in VHDL, Verilog, or SystemVerilog.
  • Experience using MATLAB, Simulink, Python, or C for modeling signal processing systems.
  • Experience implementing fixed-point DSP blocks in RTL, such as IIR and FIR filters, PWM generators, delta-sigma modulators, PLLs, DFT/FFT processors, and CORDIC processors.
  • Familiarity with development in a Linux environment. Desired
  • Experience with DO-254 FPGA compliance.
  • Experience with SEU mitigation for aviation or automotive applications.
  • Experience with C/C++ on embedded processing systems.
  • Experience with processor architecture and communications protocols, such as AXI, DMA, I2C, UART, SPI, SENT, and ethernet.
  • Experience with Xilinx FPGAs (Zynq, Artix) and Vivado toolchain experience, including creation of complex timing constraints.
  • Experience with model-based design and associated automated code generation tools. Additional Information Compensation at Joby is a combination of base pay and Restricted Stock Units (RSUs). The target base pay for this position is $132,800 - $199,300. The compensation package will be determined by job-related knowledge, skills, and experience.

Joby also offers a comprehensive benefits package, including paid time off, healthcare benefits, a 401(k) plan with a company match, an employee stock purchase plan (ESPP), short-term and long-term disability coverage, life insurance, and more.

Joby is an Equal Opportunity Employer

Options Apply for this job online Apply Share Sorry the Share function is not working properly at this moment. Please refresh the page and try again later. Share on your newsfeed If you have questions about our online applications, please see our application FAQ.

You've read the whole posting — now see how you match it.