Verification Engineer
Austin, TXJobPosted 2w agoStill listed 5 days ago
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At a glance
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Job overview
Retym, Inc. is seeking a Senior Verification Engineer to drive RTL design verification for next-generation high-speed communication technology. The engineer will own block and cluster verification, lead testbench architecture and functional coverage efforts, collaborate with design and architecture teams, and mentor colleagues. The role includes building verification environments with SystemVerilog and UVM, debugging functionality, and closing coverage against design specifications.
Skills & qualifications
Skills
Qualifications
Full job description
For an exciting well-funded start-up, developing leading edge technology of the next generation high speed communication, we are looking for a Senior Verification Engineer to be driving into the complicated RTL design verification activity on various design aspects.
Requirements:
Key responsibilities:
- Ownership of block\cluster verification end to end from scratch.
- Lead efforts of test bench architecture, Vplan definition and functional coverage.
- Work closely with the design, architecture, algo teams and other stakeholders.
- Support other team members and mentor less experienced engineers.
Requirements
- 5+ years of experience – a must
- Performed at last 2 or more full block/system verification cycles.
- In depth knowledge in VLSI verification flow, languages and concepts.
- Experience in data path or data protocols, specifically Ethernet - preferred
- Verification using one of the known methodologies (eRM, UVM).
Responsibilities
- Plan and perform the verification of digital design blocks according to the design specification and interacting with design engineers.
- Build verification environments using SystemVerilog and UVM.
- Identify and write all types of coverage measures for corner-cases.
- Debug the functionality with design engineers.
- Perform coverage collection and follow the metrices to close the full functionality.
How this job compares
Set against the 323 open Verification Engineer jobs on Olive Jobs, counted November 3, 2026.
- Pay
- This postingNot listed
- US median$131–215K/yr200 salary ranges
- Openings
- Olive Jobs lists 49 open Verification Engineer jobs in Texas and 323 across the US. 2% of them nationwide are listed as remote or flexible.
- Experience
- This posting asks for at least 5 years of experience; Verification Engineer postings that state a minimum ask for 5 years at the median (278 postings).
- Education
- 197 of the 323 open Verification Engineer jobs (61%) ask for a bachelor's degree or higher.
Counted across the open, public US postings on Olive Jobs on November 3, 2026. Pay medians are the middle values of the low ends and of the high ends of postings that list both ends of a range in the same cadence (a yearly salary or an hourly rate); a range's midpoint is halfway between its ends. Pay and experience figures resting on fewer than 20 postings are left out.
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