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Sr. Manager, Physical Design Engineering, Annapurna Labs

Amazon

San Diego, CAJob$241–350K/yrSeen todaySeen in employer's feed today

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At a glance

Compensation
$241–350K/yr
Location
San Diego, CA
Work Authorization
Not specified

Olive lists jobs from US employers, including remote roles you can work from the United States.

Job overview

Amazon’s Annapurna Labs is seeking a Senior Manager, Physical Design Engineering to build and lead a team delivering multi-billion-transistor ML accelerator SoCs. The role owns physical design strategy, technology-node enablement, tapeout execution, and continuous PPA improvement across Inferentia, Trainium, and future products. It also provides technical leadership on advanced physical design challenges and serves as a senior interface with foundry partners and EDA vendors.

Skills & qualifications

RequiredNice to have

Skills

Physical Design Team LeadershipASIC/SoC Physical DesignRTL-to-GDSIIFloorplanningClock Tree SynthesisRoutingTiming ClosurePDN DesignIR-Drop/EM SignoffPhysical VerificationSynopsys EDACadence EDASiemens CalibreAdvanced STAPower IntegrityHigh-Speed Physical DesignLow-Power DesignHierarchical MethodologiesTCLPythonPerlAI/ML Design MethodologiesProgram ExecutionExecutive Communication2.5D/3D IntegrationChiplet StrategyMulti-Foundry Technology AssessmentGeographically Distributed Team Management

Qualifications

5+ Years People Management10+ Years ASIC/SoC Physical DesignMultiple Successful TapeoutsAdvanced Node ExperienceAI/ML Accelerator Experience3nm GAA/Nanosheet Experience2nm EngagementContinuous PPA Improvement Track RecordProduction AI/ML Methodology ExperiencePatent Portfolio or Standards Contributions

Benefits

Medical Insurance
Dental Insurance
Vision Insurance
401(k) Match
Paid Time Off
Parental Leave

Full job description

Description

Annapurna Labs, designs custom silicon powering AWS’s cloud infrastructure. Custom SoCs live at the heart of Amazon ML servers — including Inferentia and Trainium Systems — delivering high-performance ML inference and training at cloud scale.

We’re looking for a Senior Manager, Physical Design Engineering to build and lead a world-class Physical Design team delivering multi-billion-transistor ML accelerator SoCs on latest tech nodes.

Key job responsibilities

  • Build, hire, and develop a physical design team of 10-15 engineers. Own headcount planning, performance management, career growth, and organizational scaling to support multiple concurrent tapeouts.

  • Own the physical design strategy and execution roadmap across Inferentia, Trainium, and future products: implementation architecture, hierarchical methodology, PPA target-setting, and technology node adoption.

  • Institutionalize continuous PPA improvement: benchmarking frameworks, regression tracking, design-quality dashboards, post-tapeout retrospectives, and structured improvement programs that compound across generations.

  • Provide hands-on technical leadership on the hardest problems: multi-GHz timing closure, PDN architecture, high-speed I/O physical design, and 2.5D / 3D cross-die integration.

  • Lead technology node enablement for 2nm and beyond: PDK evaluation, reference flow development, PPA pathfinding, and adoption recommendations.

  • Define and deploy innovative RTL2GDS methodologies and CAD flows. Champion AI/ML-augmented design automation (RL-placement, ML-guided ECO, predictive analytics). Optimize cloud infrastructure for PD compute.

  • Serve as part of senior technical interface with foundry partners and EDA vendors on tool roadmap, co-development, and technology co-optimization.

  • Own tapeout execution: readiness reviews, foundry submittal, mask data coordination, and post-silicon yield learning. Drive cross-functional alignment with RTL, DFT, STA, Package, and Validation teams.

Basic Qualifications

  • 5+ years people management leading PD teams of 8+ engineers, including hiring, performance management, and organizational growth.

  • 10+ years hands-on ASIC/SoC physical design across multiple advanced nodes (7nm, 5nm, 3nm) with multiple successful tapeouts.

  • Technical depth across full RTL-to-GDSII: floorplanning, CTS, routing, timing closure, PDN design, IR-drop/EM signoff, physical verification, and tapeout.

  • Mastery of both EDA ecosystems: Synopsys (Fusion Compiler/ICC2, PrimeTime, StarRC, RedHawk-SC) AND Cadence (Innovus, Tempus, Quantus, Voltus). Physical verification with Siemens Calibre (DRC, LVS, PERC).

  • Deep expertise in advanced STA (MMMC, POCV/AOCV, SSTA, PBA, IR-aware timing) and power integrity (static/dynamic IR-drop, EM, rush current, Ldi/dt, package-aware analysis).

  • Proven expertise in high-speed PD (multi-GHz datapaths, SerDes, DDR5, HBM, PCIe Gen5+, UCIe) and low-power design (UPF, power gating, DVFS, retention).

  • Experience with hierarchical methodologies for very large SoCs (>1B transistors). Expert scripting in TCL, Python, Perl.

Preferred Qualifications

  • Experience leading PD for AI/ML accelerators, GPUs, or high-performance data-center SoCs at leading semiconductor companies or hyperscalers.

  • Direct 3nm GAA/Nanosheet experience; 2nm or sub-2nm engagement. Familiarity with CFET and backside power delivery (BSPDN).

  • Quantifiable track record of continuous PPA improvement and metric-driven flow development across multiple projects and nodes.

  • Strong program execution: managing concurrent tapeouts, milestone tracking, risk identification, and executive communication.

  • Hands-on 2.5D/3D integration experience (CoWoS, EMIB, InFO, SoIC, Foveros) and chiplet strategy with UCIe.

  • Track record deploying AI/ML-driven design methodologies in production flows.

  • Experience with CPO, HBM4, silicon photonics, or CXL physical design.

  • Multi-foundry technology assessment experience (TSMC, Samsung, Intel Foundry Services).

  • Experience managing geographically distributed teams (U.S., Israel, global).

  • Experience scaling PD organizations through 2x–3x growth. Patent portfolio or industry standards contributions (UCIe, IEEE).

Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.

Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company’s reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records.

Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.

The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at https://amazon.jobs/en/benefits .

USA, CA, Cupertino - 277,400.00 - 350,000.00 USD annually

USA, TX, Austin - 241,200.00 - 325,600.00 USD annually

How this job compares

Set against the 2,144 open Engineering Management jobs on Olive Jobs, counted November 6, 2026.

Pay
  • This posting$241–350K/yr
  • California median$184–290K/yr298 salary ranges
  • US median$148–264K/yr1,717 salary ranges

This range's midpoint, $296K, is 26% above the California median midpoint ($235K) — in the top quarter of Engineering Management salary ranges in California.

Openings
Olive Jobs lists 352 open Engineering Management jobs in California and 2,144 across the US. 8% of them nationwide are listed as remote or flexible.
Hiring the most in California
Experience
This posting asks for at least 10 years of experience; Engineering Management postings that state a minimum ask for 8 years at the median (1,846 postings).
Education
892 of the 2,144 open Engineering Management jobs (42%) ask for a bachelor's degree or higher.

Counted across the open, public US postings on Olive Jobs on November 6, 2026. Pay medians are the middle values of the low ends and of the high ends of postings that list both ends of a range in the same cadence (a yearly salary or an hourly rate); a range's midpoint is halfway between its ends. Pay and experience figures resting on fewer than 20 postings are left out.

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