STA/Timing Closure Lead
San Jose, CAJob$180–350K/yrPosted 6 days agoStill listed 4 days ago
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Job overview
ChipAgents is hiring an STA/Timing Closure Lead to develop timing-closure solutions for very large and 3D IC designs. The role works with R&D on product architecture, runs backend and timing flows with customers, and brings customer feedback to research and product teams. It also serves as the in-house expert on static timing analysis and timing closure.
Skills & qualifications
Skills
Qualifications
Benefits
Full job description
About ChipAgents ChipAgents is revolutionizing chip design and verification with agentic-AI workflows. Founded by experts in AI and semiconductor design, we partner with top-10 semiconductor companies, hyperscale cloud providers, and cutting-edge startups. Our platform accelerates RTL development, functional verification, and simulation, unlocking new levels of productivity and design quality.
Role Overview We’re hiring an STA/Timing ClosureLead to develop solutions for closing timing on multi-billion instance ICs and 3D ICsYou’ll work with R&D to define the product architecture and refine the solution at our customer sites.
Key Responsibilities
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Design our approach to timing closure for very large designs and 3D ICs with the R&D team.
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Run backend and timing flows with customers and use what you learn to improve the product.
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Share customer feedback with research and product teams to help set priorities.
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Act as our in house expert on STA and timing closure.
Qualifications
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BS or MS in Electrical Engineering, Computer Engineering, or a related field.
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10+ years running STA and timing closure at a tier 1 design houses.
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Experience closing timing at advanced process nodes.
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Strong hands on experience with commercial synthesis and timing tools such as Design Compiler and Fusion Compiler.
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Deep knowledge of STA, Liberty formats, and device characterization.
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Background in device physics at advanced nodes.
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Experience with die to die or chiplet to chiplet timing closure.
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Experience closing timing on 3D ICs, including TSV design and interconnect timing.
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Interest in working directly with customers and shaping the product.
Nice to Haves
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Experience with the broader implementation flow, including place and route.
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Experience using AI coding agents such as Claude Code, Codex, or OpenCode.
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Scripting experience in Python, Tcl, or Makefiles.
Why ChipAgents
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Use your timing expertise to build AI tools for some of the largest chips being designed today.
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Work with a strong technical team and an advisory board of EDA veterans, with a product already used by real customers.
Equal Opportunity ChipAgents is an equal opportunity employer. We welcome applicants of all backgrounds.
What We Offer
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$180K/yr – $350K/yr base salary + equity. Open to above-scale compensation for exceptional candidates.
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Unlimited PTO and full benefits (medical, vision, dental, 401k).
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Two engineering-centric offices with free parking, private gym, and free lunch, drinks and snacks.
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