Senior Principal Design Verification Engineer

Create complex verification environments and tests, driving pre-silicon functional verification at the block, chip, and system level, reference modeling, and post-silicon validation. Interact with architects and design engineers to create verification plans covering strategy, test environments and tests, and verification requirements for IP, subsystem, and SoC level verification, then create and drive test plans and test development to provide complete feature coverage. Defining SoC security architecture and threat models, including secure boot, root of trust, identity, isolation, privilege, debug, lifecycle, and recovery. Develop verification components such as scoreboards, sequences, constraints, assertions, and functional coverage, along with Makefiles and scripts for scalable and efficient verification. Develop and implement technical solutions to complex quality and design challenges, and triage and debug testbench, simulation, and emulation failures. Apply Agile development methodologies, including code reviews, sprint planning, and frequent deployment, and collaborate with teams across sites and geographies. Requirememts: Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 7+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 10+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 12+ years technical engineering experience OR equivalent experience. These requirements include, but are not limited to, the following specialized security screening: This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their U.S. permanent residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate's citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable. CPU, graphics, or NPU security architecture or micro-architecture experience. Architecting confidential computing solutions for workload isolation, memory protection and encryption, trusted execution, attestation, and data-in-use protection. Own hardware security microarchitecture, including key management, cryptography, secure storage, anti-rollback, access control, and hardware trust boundaries. Drive end-to-end SoC security across compute, memory, I/O, chip-to-chip interfaces, firmware, and accelerators. Apply verification principles, testbench architectures, and scalable stimulus generation to enable comprehensive security verification. Partner across RTL, firmware, DV, PD, platform, and security teams on threat analysis, security verification, vulnerability closure, and silicon signoff.