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VLSI Timing Methodology Intern - Summer 2027

NVIDIA

Santa Clara, CAFull-time$20–94/hrPosted 2 days agoStill listed 1 day ago

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At a glance

Compensation
$20–94/hr
Location
Santa Clara, CA
Role Type
Internship
Schedule
Full-time
Work Authorization
Not specified

Olive lists jobs from US employers, including remote roles you can work from the United States.

Requirements

Credentials this posting asks for.

Master's degree

Job overview

The VLSI Timing Methodology Intern will research compact device and system models for predicting silicon timing behavior, including time-zero and aged behavior, in pre-silicon simulation. The intern will apply machine learning and analytical techniques to accelerate timing characterization, develop tools and methodologies for performance and reliability prediction, and explore physical effects on timing and design decisions.

Skills & qualifications

RequiredNice to have

Skills

Digital Circuit DesignMOSFET Device PhysicsStatic Timing AnalysisVLSI Backend DesignMachine LearningStatisticsPythonPerlTclBSIMDevice Compact ModelsVLSI DesignCAD Design

Qualifications

Master's Degree or HigherElectrical Engineering or RelatedVLSI Work Experience or Internships

Full job description

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to resolve, that only we can seek, and that matter to the world. This is our life’s work, to amplify human inventiveness and intelligence.

If you enjoy combining multiple interests across VLSI design, device modeling, Static timing Analysis, software development, accelerated computing and AI, you’ll love the kind of work we do. Our team combines advances in both high-performance software and VLSI hardware design to craft large scale internal CAD tools and silicon projection methodologies for delivering outstanding computing hardware. If you are passionate about innovation in these areas, let’s talk about many possible projects.

What you’ll be doing:

  • Research and develop compact device and system models to predict silicon, both time-0 and aged, timing behavior in pre-silicon simulation world
  • Use Machine Learning and analytical techniques to speed up device and system timing characterization.
  • Develop tools, and methodologies to predict and improve silicon performance and reliability beyond what industry standard tools can offer alone.
  • Explore how physical effects (e.g., IR drop, crosstalk, aging, thermal impact) influence timing and design decisions.

What we need to see:

  • Currently enrolled and pursuing a Master's degree or higher in Electrical Engineer, Computer Engineering, or related field.
  • Knowledge in digital circuit design , MOSFET device physics and Static Timing Analysis.
  • Experience in VLSI backend design.
  • Good understanding of Machine Learning and statistics.
  • Shown knowledge or experience with scripting in Python, Perl, or Tcl.

Ways to stand out from the crowd:

  • Prior VLSI working experience or internships is a plus.
  • Familiarity with BSIM or other device compact models.
  • Coursework or academic projects in VLSI Design or CAD Design.

NVIDIA is widely considered to be one of the technology world’s most desirable employers. We encourage you join our team with some of the most hard-working people in the world working together to promote rapid growth. Are you passionate about becoming a part of an outstanding team supporting the latest in GPU and AI technology? If so, we want to hear from you.

Our internship hourly rates are a standard pay based on the position, your location, year in school, degree, and experience. The expected hourly rate for this position is 20 USD – 94 USD. You will also be eligible for Intern benefits. ​

Applications for this job will be accepted at least until November 8, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

How this job compares

Set against the 1,104 open Hardware Engineering jobs on Olive Jobs, counted November 6, 2026.

Pay
  • This posting$20–94/hr
  • California median$35–50/hr54 hourly ranges
  • US median$35–41/hr90 hourly ranges

This range's midpoint, $57/hr, is 26% above the California median midpoint ($45/hr) — in the top quarter of Hardware Engineering hourly ranges in California.

Openings
Olive Jobs lists 366 open Hardware Engineering jobs in California and 1,104 across the US. Under 1% of them nationwide are listed as remote or flexible.
Hiring the most in California
Experience
Hardware Engineering postings that state a minimum ask for 7 years of experience at the median; the middle half ask for 3 to 10 years (690 postings).
Education
This posting asks for a master's degree; 32 of the 1,104 open Hardware Engineering jobs (3%) ask for a master's degree or higher.

Counted across the open, public US postings on Olive Jobs on November 6, 2026. Pay medians are the middle values of the low ends and of the high ends of postings that list both ends of a range in the same cadence (a yearly salary or an hourly rate); a range's midpoint is halfway between its ends. Pay and experience figures resting on fewer than 20 postings are left out.

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