
Design for Test Engineer
Cupertino, CAFull-time$174–225K/yrSeen todaySeen in employer's feed today
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Job overview
Apple seeks a Design for Test Engineer to review architecture and design specifications, develop verification plans, and verify DFT implementation. The role includes building testbenches, running simulations, debugging failures, generating test patterns, and supporting silicon bring-up and characterization. The position is based in Cupertino, California, and requires a master’s degree in a related engineering field and one year of relevant experience.
Skills & qualifications
Skills
Qualifications
Benefits
Full job description
Weekly Hours: 40
Role Number: 200691571-0836
Summary
Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.
Description
APPLE INC has the following available in Cupertino , California and various unanticipated locations throughout the USA. Review Architecture and Design Specifications. Extract design features and develop attributes and verification plans. Work with designers to verify DFT implementation and run various checks. Implement test benches, assertions, checkers, generating directed/constrained random tests. Debug failures, run RTL simulations/power aware gate level simulations, supervise bugs, and close coverage. Build custom testbenches with power aware designs. Generate Collaterals and reports for the test. Perform simulations in RTL, Gate Netlist, and with X-propagation and UPF enabled. Generate Pattern files with DV test scripts. Run playback simulations with the generated patterns. Handle schedules and support multi-functional engineering effort. Assist in verification flows, automation scripts and regressions. Work with test engineers to bring up functional and structural patterns for various Analog IPs and DFT features on Silicon and support further characterization and test time optimization. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $174,149 - $225,300/yr and your base pay will depend on your skills, qualifications, experience, and location.
PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html. Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Minimum Qualifications
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Master’s Degree or foreign equivalent in Computer Engineering, Electrical Engineering, Electronics Engineering, or a related field and 1 year of experience in the job offered or related occupation.
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Experience and/or education must include:
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Utilizing VLSI Design and VLSI Architecture to understand complex ASIC designs
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Using Computer Architecture to aid in understanding of compute
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Using Verilog skills to debug and verify designs
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Using Perl/Python/Tcl scripting to aid in automating scripts and internal tools
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CMOS devices and circuits
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Using Digital Logic Gate Analysis and Design
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Using Test Automation and Test Methodology
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Performing Timing Analysis to debug complex timing bugs
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Employing Synthesis and Simulation to debug RTL and netlist issues
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Utilizing DFT knowledge for generating ATE patterns and ATE debug
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Verifying memory operation behavior using knowledge of Memory Circuits
Preferred Qualifications
- N/A
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
How this job compares
Set against the 324 open Verification Engineer jobs on Olive Jobs, counted November 6, 2026.
- Pay
- This posting$174–225K/yr
- California median$146–223K/yr113 salary ranges
- US median$134–215K/yr201 salary ranges
This range's midpoint, $200K, is 7% above the California median midpoint ($188K) — in the middle half of Verification Engineer salary ranges in California.
- Openings
- Olive Jobs lists 157 open Verification Engineer jobs in California and 324 across the US. 2% of them nationwide are listed as remote or flexible.
- Experience
- This posting asks for at least 1 year of experience — less than three in four Verification Engineer postings that state a minimum ask for (median 5 years, across 282 postings).
- Education
- 195 of the 324 open Verification Engineer jobs (60%) ask for a bachelor's degree or higher.
Counted across the open, public US postings on Olive Jobs on November 6, 2026. Pay medians are the middle values of the low ends and of the high ends of postings that list both ends of a range in the same cadence (a yearly salary or an hourly rate); a range's midpoint is halfway between its ends. Pay and experience figures resting on fewer than 20 postings are left out.
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