PCB Design & Validation Engineer
Palo Alto, CAJobPosted 3mo agoStill listed today
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Job overview
CScale is seeking a PCB Design & Validation Engineer to design test and evaluation boards and lead validation of high-speed optical transceivers. The role covers PCB platforms for development and characterization, transceiver requirements, validation planning, and testing across electrical, optical, and control subsystems. It may also lead PCB design for the transceiver module itself.
Skills & qualifications
Skills
Qualifications
Full job description
CScale is building the interconnect for gigawatt-scale AI. As AI scale-up moves toward deployments spanning thousands of accelerators and dozens of racks, the network needs to deliver high bandwidth, predictable low latency, and continuous communication. CScale is building integrated optical interconnect designed for this new scale, enabling accelerators to work together like a single, much larger computer. But at this scale, performance is only part of the challenge. Optical failures are inevitable, and the system needs to keep running. CScale is designing the interconnect for continuity. Lasers will fail. Compute shouldn’t. The ambition is simple: Build AI interconnect you can take for granted. CScale came out of stealth in September 2026 with $145 million in Series C funding, bringing total funding to $188 million.
We are seeking a PCB Design & Validation Engineer to own the design of test/eval boards and lead validation of our high-speed optical transceivers. You will design the PCB platforms that enable development and characterization, with the opportunity to lead PCB design for the transceiver module itself. You will review transceiver requirements, develop validation plans, and execute them across all major electrical, optical and control subsystems.
Key Responsibilities
PCB Design
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Own schematic capture, component selection, and layout for test/eval boards, development platforms, and transceiver module PCBs
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Design multi-layer, controlled-impedance boards with high-speed NRZ routing, mixed-signal considerations, and PDN design
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Manage DRC, fab outputs (Gerbers, assembly drawings), vendor coordination; maintain schematic/footprint libraries
Validation & Characterization
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Develop and execute validation plans covering silicon, module, and system-level testing with defined pass/fail criteria
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Characterize SerDes performance (jitter, eye diagrams, BER, equalization) and validate data pipeline
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Validate optical subsystems (laser/modulator power, extinction ratio, wavelength stability; mux/demux isolation, insertion loss)
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Test MCU firmware interactions, boot sequences, EEPROM integrity, I2C compliance, and CMIS register map implementation
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Execute host interop testing, standards compliance (IEEE 802.3, CMIS, OIF), and reliability sequences (HTOL, thermal cycling)
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Build test setups and Python automation; create data analysis pipelines; document procedures and results
Required Qualifications
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5+ years in PCB design and/or hardware validation for high-speed digital/optical systems
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Proficiency with PCB design tools (Altium Designer, Cadence Allegro, or equivalent); multi-layer boards with controlled impedance
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Hands-on high-speed serial link validation: eye diagrams, BER testing, jitter analysis, S-parameters
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Proficiency with lab instrumentation: real-time oscilloscopes, BERT, optical power meters, VNA, TDR
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Understanding of transceiver architectures and subsystems (SerDes, TIA, driver, laser, modulator)
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Python scripting for test automation; familiarity with I2C, SPI, and serial protocols
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BS/MS in Electrical Engineering or equivalent
Preferred Qualifications
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Experience with NRZ optical transceiver validation and silicon characterization across PVT corners
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Familiarity with SI/PI simulation tools (HyperLynx, HFSS, ADS); flex-rigid or HDI PCB design experience
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Experience with CMIS or similar management interfaces; Ethernet compliance testing
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Knowledge of reliability testing methodologies (Telcordia, JEDEC) and FEC performance validation
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Experience in a startup or fast-paced development environment
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