Lead Photonics Design Engineer - III/V Components

Salience Labs

San Fransico, CA · HybridFull-timePosted 2 days agoStill listed 1 day ago

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At a glance

Compensation
No compensation found
Location
San Fransico, CAHybrid
Schedule
Full-time
Work Authorization
Not specified

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Job overview

Salience Labs is developing optical circuit switching technology for AI infrastructure. The Lead Photonics Design Engineer will lead development of III-V active components for integration with silicon photonics, taking devices from epitaxial stack and design through partner fabrication, characterization, reliability, and qualification. The role includes owning device roadmaps and specifications, leading testing and design iterations, and mentoring engineers.

Skills & qualifications

RequiredNice to have

Skills

III-v Device DesignDevice ModellingOptical GainCarrier DynamicsQuantum-Well DesignNoise AnalysisGain SaturationNonlinearitiesThermal EffectsPolarisation DependenceIII-v EpitaxyMOCVDMBELithographyEtchingPassivationMetallisationFacet/AR CoatingFoundry CollaborationOptical Spectrum AnalysisGain MeasurementNoise MeasurementWafer-Level ProbingTemperature-Controlled TestingTest AutomationLumericalPhoton DesignCrosslightRSoftCOMSOLKLayoutL-EditCadence VirtuosoTechnical Project LeadershipCommunicationCritical ThinkingAttention to DetailSelf-MotivationSilicon Photonics IntegrationCoupling Design

Qualifications

PhD in Related Field or Master's6+ Years Relevant Experience8+ Years Relevant Experience4+ Years III-v Device DevelopmentIII-v Device Development Track RecordMentoring or Supervising EngineersLine-Managing Technical TeamReliability Testing and Failure AnalysisPDK Building Blocks or Compact ModelsHigh-Quality Patents and Research Papers

Full job description

About us Salience Labs is developing optical circuit switching technology for AI infrastructure, aimed at reducing latency and cost in data centre networks. As we move towards deployment, you'll have real ownership of your area and work alongside a highly technical team on a hard problem in AI infrastructure. The role You'll join a multi-disciplinary research team in the UK to lead the development of III-V active components for integration with silicon photonics. You will take devices from epitaxial stack and device design through fabrication with external partners, to characterisation, reliability and qualification. What you'll be doing

  • Lead the design and modelling of III-V active devices, including epitaxial layer structure, gain and power modelling, optical mode design, and electrical and thermal design

  • Own the technology roadmap and device specifications for your area, translating system requirements into device design and integration targets

  • Lead mask design and tape-outs, including GDS layouts, test structures and design-of-experiment splits

  • Manage fabrication runs with external epitaxy and foundry partners: define process flows, review process and in-line data, and resolve yield issues as the technology scales

  • Define and lead the characterisation strategy at wafer, chip and integrated-PIC level, including building and automating test setups

  • Analyse test data, correlate measured performance with design and process variations, and drive design iterations to close performance gaps

  • Work with packaging and reliability engineers on burn-in, accelerated ageing, failure analysis and qualification

  • Mentor engineers and, as the team grows, help recruit and develop new team members

Essential requirements

  • PhD in physics, photonics, electrical engineering, optical engineering or a related subject with 6+ years' relevant experience, or a Master's degree with 8+ years' relevant experience, including at least 4 years' hands-on development of III-V optical amplifiers or semiconductor lasers, preferably in industry

  • Proven track record of taking III-V devices from concept through design, fabrication and test, ideally including qualification

  • Deep understanding of semiconductor laser and amplifier physics: optical gain, carrier dynamics, quantum-well design, noise, gain saturation and nonlinearities, thermal effects and polarisation dependence

  • Hands-on knowledge of III-V epitaxy and fabrication processes (e.g. MOCVD/MBE growth, lithography, etching, passivation, metallisation, facet/AR coating), and experience working with external foundries

  • Experience characterising amplifiers or lasers, including optical spectrum analysis, gain and noise measurement, wafer-level probing, temperature-controlled testing and test automation

  • Experience with simulation and layout tools for photonic devices, such as Lumerical, Photon Design, Crosslight, RSoft, COMSOL, KLayout, L-Edit or Cadence Virtuoso

  • Proven ability to lead technical projects across design, process, test and packaging functions, and experience mentoring or supervising engineers

  • Excellent communication skills, critical thinking, attention to detail and self-motivation

Nice to have

  • Experience integrating III-V active devices with silicon photonics, including coupling design between III-V and silicon waveguides

  • Experience line-managing a technical team

  • Experience with reliability testing and failure analysis of III-V devices

  • Experience developing PDK building blocks or compact models for active devices

  • Programming experience (Python, MATLAB or C++) for simulation, test automation and data analysis

  • Knowledge of photonic packaging, including fibre coupling, thermal design and TEC control

  • A track record of high-quality patents and research papers

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