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Hardware Engineer, AI Accelerator Module Design

Meta

Fremont, CAJob$144–204K/yrSeen 5 days agoSeen in employer's feed 5 days ago

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At a glance

Compensation
$144–204K/yr
Location
Fremont, CA
Work Authorization
Not specified

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Requirements

Credentials this posting asks for.

Bachelor's degree

Job overview

Meta’s HDRTP engineering team designs and delivers hardware platforms for AI and HPC infrastructure. The AI Accelerator Module Design Engineer owns electrical and PCB design from requirements and ASIC package-to-board co-design through bring-up and volume production. The role drives trade-offs across signal integrity, power integrity, thermal, mechanical, and cost, and collaborates with engineering teams and manufacturing partners on accelerator modules.

Skills & qualifications

RequiredNice to have

Skills

Electrical DesignPCB DesignASIC Package-to-Board Co-DesignBreakout RoutingPower Delivery Network DesignHigh-Speed Interface DesignSerDes Channel DesignBoard Bring-UpDebugFailure AnalysisOscilloscopesVNAsTDRPower AnalyzersTechnical CommunicationPythonSKILL/LISPCross-Functional CollaborationSI/PI SimulationLiquid-Cooled Module DesignHDI TechnologiesRigid-Flex TechnologiesEmbedded ComponentsAdvanced SubstratesNext-Generation Interconnects

Qualifications

BS in Electrical Engineering, Computer Engineering, or Related6+ Years Electrical and PCB DesignComplex Board or Module Through ProductionCadence Allegro/OrCADAltium Designer8+ Years Module or Board DesignMS in Electrical EngineeringOpen-Source Hardware ContributionsOpen Compute Project ContributionsExternal Technical PublicationsAnsys HFSSCadence Sigrity

Full job description

Summary:

The Hardware Design, Rack-scale Technology and Platforms (HDRTP) engineering team designs, develops, validates, and delivers the hardware platforms that power Meta's AI and HPC infrastructure, deployed in data centers worldwide. Our designs are published for industry adoption through the Open Compute Project Foundation. We are seeking an AI Accelerator Module Design Engineer to own the electrical and PCB design of accelerator modules supporting Meta's custom silicon (MTIA) and third-party AI accelerators. You will own module-level electrical design end to end from requirements and ASIC package-to-board co-design through schematic, stackup, power delivery, bring-up, and volume production on one or more programs. You will work within established design methodologies and reference architectures, and contribute improvements to them. You will drive cross-domain trade-offs between signal integrity, power integrity, thermal, mechanical, and cost, partnering with senior engineers and architects on the most ambiguous decisions. You will operate independently on your program's scope in a fast-moving environment.

Required Skills:

Hardware Engineer, AI Accelerator Module Design Responsibilities:

  1. Own the electrical design and PCB implementation of AI accelerator modules for high-performance, high-power custom silicon (MTIA) and third-party accelerators

  2. Contribute to module requirements and specifications in partnership with ASIC, platform, rack, and systems architecture teams

  3. Execute ASIC package-to-board co-design, including breakout routing, substrate interaction, and escape feasibility analysis for high pin-count devices

  4. Design power delivery networks for high-current loads, including DC-DC topology selection, decoupling strategy, and plane/stackup partitioning

  5. Implement high-speed interface design across PCIe Gen5/Gen6, CXL, DDR5/LPDDR, HBM, and Ethernet up to 800G, including simulation-guided stackup and channel budgeting

  6. Partner with Signal and Power Integrity teams on SI/PI analysis and simulation-to-measurement correlation for your designs

  7. Participate in and prepare module-level design reviews

  8. ensure schematic, layout, and DFM/DFT readiness for your designs

  9. Lead board bring-up and debug

  10. root-cause electrical, power, and interoperability failures and drive design fixes to closure

  11. Work with ODM/JDM partners through NPI-to-mass-production cycles, holding partners to Meta design standards and schedule

  12. Contribute to reusable reference designs, design-rule libraries, and design automation

  13. support publication through the Open Compute Project

  14. Evaluate emerging technologies with industry partners – HDI and advanced substrates, embedded components, novel materials

  15. Collaborate across hardware, firmware, mechanical, thermal, and manufacturing teams to resolve cross-functional issues

  16. Share knowledge and help onboard other PCB/module design engineers

Minimum Qualifications:

Minimum Qualifications:

  1. BS in Electrical Engineering, Computer Engineering, or a related technical discipline

  2. 6+ years of experience in electrical and PCB design for high-speed, high-power digital systems (servers, accelerators, networking, or HPC)

  3. Experience taking at least one complex custom board or module design from concept through volume production

  4. Proficiency with EDA tools for schematic capture and PCB design (Cadence Allegro/OrCAD, Altium Designer, or equivalent)

  5. Experience with high-speed digital interface design (PCIe, CXL, DDR4/DDR5, HBM, Ethernet 25G+) and SerDes-based channel design

  6. Experience with power delivery network design for high-current loads, including DC-DC topology selection and decoupling strategy

  7. Experience with board bring-up, debug, and failure analysis using oscilloscopes, VNAs, TDR, and power analyzers

  8. Experience communicating technical trade-offs clearly in writing and verbally

Preferred Qualifications:

Preferred Qualifications:

  1. 8+ years of experience in module or board design for AI/ML accelerators, data center, or HPC hardware

  2. MS in Electrical Engineering with emphasis on electromagnetics, signal integrity, or power electronics

  3. Scripting or design-automation experience (Python, SKILL/LISP, or equivalent)

  4. Experience collaborating across hardware, firmware, mechanical, thermal, and manufacturing teams

  5. Exposure to ASIC or GPU package-to-board co-design and breakout routing for high pin-count devices

  6. Contributions to open-source hardware or the Open Compute Project, or external technical publications

  7. Experience with liquid-cooled or thermally-constrained module design

  8. Hands-on experience with SI/PI simulation tools (Ansys HFSS, Cadence Sigrity, Keysight ADS/PathWave, or equivalent)

  9. Experience with HDI, rigid-flex, embedded component, or advanced substrate technologies

  10. Experience designing accelerator modules for custom in-house silicon

  11. Experience working with external ODM/JDM or component partners

  12. Experience with next-generation interconnect: PCIe Gen6, CXL 3.x, UCIe, scale-up fabrics, or co-packaged optics

Public Compensation:

$144,000/year to $204,000/year + bonus + equity + benefits

Industry: Internet

Equal Opportunity:

Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.

Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at [email protected].

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