Physical Design Lead
San Francisco, CAFull-timePosted 1 day agoStill listed today
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Job overview
Phinity is an AI research lab developing AI agents and infrastructure to autonomously take chips from architecture through post-silicon. The Physical Design Lead will lead physical-design flows and optimization from block to full-chip level, define synthesis-to-layout flows, and deliver tapeout-ready designs optimized for target PPA. The role works with PD engineers and uses the lab’s prompt-to-GDS capability.
Skills & qualifications
Skills
Benefits
Full job description
Phinity is an AI research lab focused on solving chip design. The bottleneck to AGI is compute, and we enable AI agents to tape-out chips autonomously, from architecture to post-silicon. We are building RL environments, agent infrastructure, and evaluation systems to accomplish this. Our team brings together deep AI and silicon expertise, including leaders and executives from top chip companies, post-training chip-design models at NVIDIA, AI for formal verification research, previous exits, and over 10 years of experience building chips at NVIDIA, Intel, Mediatek, and others.
We are hiring a Physical Design Lead.
You will be responsible for:
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Leading PD flows and optimization of block-level to full-chip level optimizations
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Define Synthesis to layout flows, including PDN, clock-trees, PVT corners and custom cell definitions. Responsible for implementing characterization flows for custom cells and memory blocks.
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Responsible for executing IP and Fullchip design optimizations working with PD engineers. Identify areas of optimization in design utilization, power grid and clock network within the design.
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Responsible for delivering tapeout ready design optimized for the target PPA, and utilizing the in-house capability on prompt-to-GDS.
Why Phinity
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Work directly with the founders to shape the strategy and growth of an ambitious AI research lab
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Take ownership of high-impact initiatives across business strategy, partnerships, and company operations
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Collaborate with leading AI researchers and hardware experts at the frontier of autonomous chip design
Benefits include
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Health insurance
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Retirement plans
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Unlimited PTO
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Paid parental leave
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Lunch and dinner provided in-office
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