Senior Design Verification CAD Engineer, Silicon, Google

Senior Design Verification CAD Engineer, Silicon, Google

Share Senior Design Verification CAD Engineer, Silicon, Google

corporate_fare Google place Sunnyvale, CA, USA

Mid

Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area.

Share Senior Design Verification CAD Engineer, Silicon, Google

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XIn most instances, this position requires in-person interviews as part of the hiring process.

Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Science Engineering, or equivalent practical experience.

• 5 years of experience working with Computer-aided design (CAD).

• Experience with SystemVerilog, hardware design, automation, design verification test.

• Experience with developing tools in one or more programming languages such as Python or C/C++.

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science or a related field.

• Experience planning and deploying new tools and flows to users.

• Knowledge of the chip design process for design and verification.

• Ability to present and explain novel methods to users.

About the job

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

As a Senior Engineer within Google's Silicon team, you will help deliver products that have a substantive impact on the technical infrastructure that powers Google. You will provide leadership to a group of hardware engineers in a fluid environment with a focus on infrastructure for chip design. You will also lead the technical projects from the concept/planning stage through execution and closure. In this role, you will help your team deliver designs that work for the first time in a number of different application areas. Leveraging your technical and leadership expertise, you will lead the chip design process improvement projects in multiple areas of expertise.

The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

We're the driving team behind Google's groundbreaking innovations, empowering the development of our AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.

Individual pay is determined by factors including job-related skills, experience, and relevant education or training.

US: $163000 - $236000 (USD) + 15% bonus target + equity + benefits

Learn more aboutbenefits at Google (https://www.google.com/about/careers/applications/benefits/) .

Responsibilities

• Lead CAD methodology engineers to provide support for chip Design Verification (DV) teams, and manage and mitigate support issues for tool flows.

• Partner with Chip Project teams to influence and standardize methodology across functional areas and geography.

• Perform or guide technical evaluations of tools for possible deployment.

• Collaborate with teams across Google to identify and create opportunities for improved chip design across Google.

• Participate in design reviews and track issue resolution and engage in technical and schedule trade-off discussions.

Information collected and processed as part of your Google Careers profile, and any job applications you choose to submit is subject to Google'sApplicant and Candidate Privacy Policy (./privacy-policy) .

Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law. See alsoGoogle's EEO Policy (https://www.google.com/about/careers/applications/eeo/) ,Know your rights: workplace discrimination is illegal (https://careers.google.com/jobs/dist/legal/EEOC\_KnowYourRights\_10\_20.pdf) ,Belonging at Google (https://about.google/belonging/) , andHow we hire (https://careers.google.com/how-we-hire/) .

If you have a need that requires accommodation, please let us know by completing ourAccommodations for Applicants form (https://goo.gl/forms/aBt6Pu71i1kzpLHe2) .

Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.

To all recruitment agencies: Google does not accept agency resumes. Please do not forward resumes to our jobs alias, Google employees, or any other organization location. Google is not responsible for any fees related to unsolicited resumes.

Equity is granted exclusively and discretionarily by Alphabet Inc. on the basis of an agreement concluded between you and Alphabet Inc. Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not guaranteed, are discretionary, are subject to approval by the Alphabet Inc. board of directors or its delegate, the terms of the relevant Alphabet Inc. stock plan, and your grant agreement. They have no impact on statutory payments. Current or past grants do not confer an acquired right.

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also https://careers.google.com/eeo/ and https://careers.google.com/jobs/dist/legal/OFCCP_EEO_Post.pdf If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form: https://goo.gl/forms/aBt6Pu71i1kzpLHe2.