Senior Firmware Engineer, Edge AI / NPU Runtime
San Francisco, CAFull-time$150–200K/yrPosted 3w agoStill listed today
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Job overview
Tacit is an early-stage San Francisco deep-tech startup developing hardware for human-computer interaction. The Senior Firmware Engineer, Edge AI / NPU Runtime will architect, optimize, and ship on-device intelligence for neurotechnology hardware, owning critical parts of the embedded AI stack from realtime sensor acquisition through inference and deployment. The role works close to hardware and focuses on latency, reliability, and power constraints.
Skills & qualifications
Skills
Qualifications
Benefits
Full job description
About Tacit We are an early-stage, deep tech startup based in San Francisco, developing innovative hardware that rethinks human-computer interaction. We are backed by General Catalyst, Khosla Ventures, and Greylock Partners, with a founding team from Stanford, BrainGate, Oculus, and Tesla. While we can’t reveal too much just yet, our team is tackling cutting-edge engineering challenges to bring revolutionary products to life. About the role We’re looking for a Senior Firmware Engineer, Edge AI / NPU Runtime to help architect, optimize, and ship next-generation neurotech hardware with production-grade on-device intelligence. You will own critical parts of the embedded AI stack, from realtime sensor acquisition through preprocessing, NPU/DSP-accelerated inference, postprocessing, telemetry, and product deployment. This is a hands-on role for someone who wants to work close to the hardware while shaping the intelligence users experience in the product. You’ll help define how models run on-device, how sensor data moves through the system, and how we meet tight latency, reliability, and power budgets in real-world use.
What you'll do
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Edge AI & NPU Inference
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Own deployment of ML models onto embedded targets using NPUs, DSPs, MCUs, or other hardware accelerators.
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Integrate embedded inference runtimes, vendor NPU/DSP SDKs, and model deployment workflows into production firmware.
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Optimize inference latency, memory footprint, throughput, power consumption, and accelerator utilization on production hardware.
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Partner with ML teams on quantization, operator support, model architecture tradeoffs, calibration datasets, and accuracy/performance regressions.
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Realtime Sensor-to-Inference Systems
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Build realtime sensor-to-inference pipelines, including acquisition, timestamping, synchronization, preprocessing, feature extraction, model execution, and postprocessing.
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Design low-latency data movement using DMA, interrupts, ring buffers, deterministic scheduling, and efficient memory layouts.
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Support streaming inference patterns such as sliding windows, temporal models, event-driven execution, and continuous sensor processing.
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Maintain inference quality and timing guarantees under real-world conditions such as sensor noise, clock drift, dropped samples, variable system load, and power-state transitions.
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Power-Optimized Embedded Firmware
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Optimize end-to-end energy per inference across sensing, preprocessing, model execution, postprocessing, and idle time.
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Use low-power firmware techniques such as sleep states, duty cycling, subsystem power gating, clock scaling, batching/windowing, and dynamic power management.
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Profile and improve power consumption across sensors, CPU, NPU/DSP, memory, and supporting firmware infrastructure.
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Product Quality & Debugging
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Bring up and debug firmware across sensors, accelerators, power systems, embedded compute, and production hardware.
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Use lab tools, traces, logs, telemetry, and instrumentation to root-cause complex embedded system issues.
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Translate product and customer experience goals into concrete latency, reliability, responsiveness, and power targets.
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Build diagnostics, validation hooks, and performance benchmarks to ensure reliable real-world edge inference behavior.
Requirements
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5+ years of experience in embedded firmware, embedded systems, or edge ML systems.
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Strong C/C++/Rust experience on resource-constrained embedded platforms.
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Experience with RTOS-based systems such as FreeRTOS, Zephyr, ThreadX, or similar.
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Experience deploying or optimizing ML inference on embedded targets, NPUs, DSPs, MCUs, or edge SoCs.
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Strong understanding of realtime embedded systems, including DMA, interrupts, concurrency, memory management, and low-latency data movement.
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Experience optimizing embedded systems for latency, memory footprint, throughput, and power consumption.
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Hands-on debugging and bring-up experience across embedded hardware and firmware systems, with strong cross-functional communication across firmware, ML, electrical, software, and product teams.
Strong candidates may have
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Experience with embedded inference runtimes, deployment toolchains, or edge AI SoCs/accelerators such as TensorFlow Lite Micro, ONNX Runtime, CMSIS-NN, Qualcomm QNN/SNPE, ARM Ethos-U/Vela, TVM, ExecuTorch, Qualcomm, ARM, Cadence/Tensilica, Syntiant, Ambiq, Nordic, NXP, ST, Hailo, Google Edge TPU, or similar.
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Experience with quantized inference, fixed-point math, SIMD/DSP optimization, accelerator programming, or model conversion workflows.
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Experience with streaming or time-series ML workloads such as biosignals, sensor fusion, audio, gesture recognition, keyword spotting, or other realtime inference systems.
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Experience shipping battery-powered consumer electronics, wearable, neurotech, AR/VR, robotics, camera, IoT, or other embedded AI products.
Compensation Range $150,000 - $200,000/year
Benefits
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Competitive equity package
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Comprehensive medical, dental, and vision insurance
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Company size: 20-30 people
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Unlimited PTO
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Visa sponsorship
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4% 401k matching
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