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Sr. Embedded Application Engineer - FPGA

SkySERVE

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At a glance

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Job overview

SkyServe seeks a Senior Embedded Application Engineer - FPGA to design and optimize image-processing applications for FPGA and GPU platforms. The engineer will bring machine-learning models from research into real-time embedded environments, working with hardware, firmware, and data science teams. The role combines embedded systems engineering and applied AI, with a focus on performance across heterogeneous compute architectures.

Skills & qualifications

RequiredNice to have

Skills

Field-Programmable Gate Array (FPGA)Graphics Processing Unit (GPU)C (Programming Language)C++ (Programming Language)Python (Programming Language)Machine LearningEmbedded SystemsNvidia CUDAOpenCLLinuxTensorflowOpenxHLSEmbedded Software DevelopmentFPGA DevelopmentGPU ProgrammingML Inference FrameworksML Deployment OptimizationComputer ArchitectureMemory HierarchiesHardware-Software Co-DesignEmbedded LinuxDebuggingML FundamentalsModel QuantizationModel PruningInference OptimizationHeterogeneous SoC PlatformsComputer VisionSensor FusionSignal ProcessingMLOpsHardware-Accelerated NetworkingHigh-Speed InterfacesOpen-Source FPGA/ML Projects

Qualifications

Bachelor's or Master's in EE, CE, CS or Related3+ Years HLS, C/C++ and Embedded Development

Full job description

About Us SkyServe is sensor agnostic "Insights-as-a-Service" edge computing platform on-board satellites, providing inferences to industries, system integrator, and geospatial developers. Position Overview We are looking for a Senior Embedded Application Engineer - FPGA to design, develop, andoptimize image processing applications deployed on FPGA & GPU compute platforms. Youwill work closely with hardware, firmware, and data science teams to bring machine learningmodels from research to real-time, resource-constrained embedded environments. This role sitsat the intersection of embedded systems engineering and applied AI, and is ideal for someonewho enjoys squeezing maximum performance out of heterogeneous compute architectures. Key Responsibilities

  • Design, develop, and deploy AI/ML inference pipelines on embedded platformscombining FPGA and GPU compute elements.

  • Optimize and port trained ML models (CNNs, RNNs, transformers, etc.) for real-timeinference on edge/embedded hardware.

  • Develop and maintain HDL/HLS-based accelerators (Verilog/VHDL or HLS in C/C++)for ML workloads on FPGA.

  • Implement and tune GPU kernels (CUDA/OpenCL) for performance-critical MLoperations.

  • Collaborate with ML Engineers to convert and quantize models (TensorRT, TVM, ONNX,Vitis AI, etc.) for embedded deployment.

  • Profile and benchmark system performance (latency, throughput, power) across FPGAand GPU subsystems, and drive optimization.

  • Work with hardware teams on board bring-up, driver integration, and hardware-softwareco-design.

  • Build and maintain embedded Linux/yocto petalinux-based application softwareinterfacing with FPGA/GPU accelerators.

  • Debug system-level issues spanning hardware, drivers, firmware, and application layers.

  • Document architecture, design decisions, and performance benchmarks for internal andcustomer-facing use.

  • Collaborate cross-functionally with product management and customers to understanduse-case requirements and translate them into technical specifications. Required Skills & Qualifications

  • Bachelor's/Master's degree in Electrical Engineering, Computer Engineering, ComputerScience, or a related field.

  • 3+ years of experience in HLS, C,C++, embedded software/application development.

  • Strong programming skills in C/C++; working knowledge of Python for ML tooling andscripting.

  • Hands-on experience with FPGA development (Xilinx Vitis/Vivado, Intel Quartus, orsimilar) HLS or RTL experience preferred.

  • Experience with GPU programming (CUDA, OpenCL) and/or ML inference frameworks(TensorRT, cuDNN).

  • Familiarity with ML model deployment/optimization tools: ONNX, TVM, Vitis AI,OpenVINO, or equivalent.

  • Solid understanding of computer architecture, memory hierarchies, andhardware-software co-design principles.

  • Experience with embedded Linux/petalinux (device drivers, kernel modules, boardbring-up) or Vivado environments.

  • Strong debugging skills using JTAG, oscilloscopes, logic analyzers, and other hardwaredebug tools.

  • Understanding of ML fundamentals; model architectures, quantization, pruning, andinference optimization techniques. Preferred / Nice-to-Have

  • Experience with heterogeneous SoC platforms (e.g., Xilinx Zynq/Versal, NVIDIA Jetson,Intel Agilex).

  • Exposure to computer vision, sensor fusion, or signal processing applications.

  • Familiarity with MLOps pipelines for edge deployment.

  • Experience with hardware-accelerated networking or high-speed interfaces (PCIe,Ethernet, MIPI, SFP+).

  • Prior work in domains such as robotics, autonomous systems, defense, telecom, orindustrial automation.

  • Contributions to open-source FPGA/ML projects.

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