
Senior Physical Verification Engineer (10491)
Apopka, FLJobSeen 1w agoSeen in employer's feed 1w ago
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Job overview
The Senior Physical Verification Engineer joins a team of EDA/DRC engineers supporting design verification for RF-ICs, acoustic wave filters, and modules. The role develops and maintains utilities and physical verification decks, supports design verification flows, and provides tool and infrastructure support. The team helps the engineer acquire technical knowledge and methods. The position requires access to ITAR/EAR technologies and a US Person or eligibility to obtain export authorizations.
Skills & qualifications
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Full job description
**Veterans Preference ** Summary The candidate will join a team of EDA/DRC engineers enabling design verification used in the design flow for RF-ICs, acoustic wave filters, and modules. The position will involve development and maintenance of custom utilities, quality assurance and construction of Physical Verification decks, and providing design verification services. Responsibilities: - You will work among a team of experienced Development engineers who will help you acquire technical knowledge and methods. - Over time, your responsibilities will include: - Module technologies include SAW/BAW IC, Laminate, GaAs/GaN IC and Si IC - Implement Physical Verification DRC/LVS/PERC rule decks. - Support and enhance design verification flow. - Create project specifications and requirements in cooperation with engineering teams - Provide user support for AWR, ADS, Virtuoso. - Maintain EDA infrastructure and assist engineers in the installation and setup of EDA tools - Develop scripts to automate design engineering problems. - Build and maintain SharePoint sites for the EDA team. Required Qualifications: - Bachelors Degree in Electrical/Electronics Engineering, Computer Engineering, or a related field - 5+ years of related experience or an equivalent amount of education and experience - Experience in industry standard physical verification tools such as Siemens Calibre, Synopsys ICV or Cadence PVS. - Proficiency in using Linux, coding using TCL , VB, C, PERL, Python and general programming - Must be able to work within a fast-paced team that is solving problems in a complex technology integration environment - Self-managed, results oriented and requires little supervision and direction - Interpersonal communication and documentation skills - Employer conductsBackground Checks Preferred Qualifications: - Masters Degree in in Electrical/Electronics Engineering, Computer Engineering, or a related field - Any exposure to below technologies, techniques, or tools during your education or through internship(s) will be a plus: - Electronic Design Automation (EDA) and/or Physical Design Verification Flows - Cadence MicroWave Office (MWO), Ansys HFSS, Keysight ADS, Cadence Virtuoso, Siemens Pyxis. - Experience with high performance RF IC and/or module design verification, including DRC, LVS and PERC This position requires access to ITAR/EAR technologies. Applicant must be a US Person (US citizen, permanent resident, asylee, or refugee) or eligible to obtain necessary export authorizations. We are an Equal Employment Opportunity (EEO) employer and welcome all qualified applicants. Applicants will receive fair and impartial consideration without regard to any characteristics protected by applicable law, including race, color, religion, sex (as defined by law), national origin, age, military or veteran status, genetic information, or disability.
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