Technical Lead Engineer — Network Validation & Characterization
Sunnyvale, CAJob$212–294K/yrSeen 1 day agoSeen in employer's feed 1 day ago
Most applications go out cold — see where you stand first. No sign-up to start.
Watch jobs like this. New roles like this one near Sunnyvale, CA, by email.
Don't just apply. Show up ready.
Olive works from this exact posting.
At a glance
Olive lists jobs from US employers, including remote roles you can work from the United States.
Job overview
Meta’s Infrastructure team builds scalable custom ASIC solutions for data centers, handling pre‑silicon emulation, silicon bring‑up, and PVT characterization. The role creates test plans, automation frameworks, and lab infrastructure, while leading validation strategy, collaborating with hardware designers, and transferring learnings to production fleets.
Skills & qualifications
Skills
Qualifications
Full job description
Summary:
Meta's Infrastructure team delivers scalable and reliable custom ASIC solutions to meet Meta's data center needs. Ramping to production and solving data center scaling and deployment challenges requires a systems-based approach to silicon bring-up and validation.The team works on productization: early architecture and design inputs, pre-silicon validation on emulation platforms, first-silicon bring-up, and post-silicon characterization across process, voltage, and temperature corners. We write tests, build bare-metal environments and reusable frameworks that scale from pre-silicon platforms to large fleets of ASICs in the lab, and we build and maintain extensive lab automation to do it at volume and velocity.
Required Skills:
Technical Lead Engineer — Network Validation & Characterization Responsibilities:
-
Own the end-to-end validation and characterization strategy for Meta custom silicon programs in your domain, from pre-silicon emulation through post-silicon bring-up and PVT characterization
-
Define the test plan: measurement and benchmarking methodology, instrumentation, functional and performance coverage, corner coverage across process/voltage/temperature, and pass/fail criteria
-
Establish and document best practices for measurement rigor, accuracy, and correlation across bench, emulation, and ATE/production data
-
Drive validation of domain feature sets (power or networking) on emulation platforms pre-silicon and on real silicon post-silicon
-
Review schematics, power delivery networks, high-speed interface designs, and board/platform configurations with hardware and design teams
-
provide early design and debuggability inputs
-
Write and review automation and analysis code that scales characterization from a single bench to many units in the lab
-
Lead debug of complex cross-stack issues — silicon, firmware, driver, board, thermal, and fabric/switch layers — and drive root cause to closure with design, software, hardware, ODM, and vendor partners
-
Provide technical guidance and planning for a team of validation engineers
-
mentor engineers and improve standards for data quality and rigor
-
Partner with manufacturing, production, and data center teams to transfer characterization learnings into production screens and fleet health monitoring
Minimum Qualifications:
Minimum Qualifications:
-
Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
-
12+ years of relevant industry experience
-
Demonstrated hands-on validation and characterization experience on complex ASICs, SoCs, NICs, or high-speed interfaces
-
Proven experience with PVT (Process / Voltage / Temperature) characterization
-
Ability to read and reason about schematics and either power delivery networks or high-speed interface implementations
-
Proficiency in Python for test development, lab automation, and/or data analysis
-
Hands-on lab experience with domain-relevant instrumentation
Preferred Qualifications:
Preferred Qualifications:
-
Experience taking a custom NIC or networking ASIC from first silicon through high-volume production
-
Experience working directly with ODMs and silicon/IP vendors
-
Hands-on lab experience with domain-relevant instrumentation for Networking - traffic generators, protocol analyzers, high-speed scopes/BERTs, optics and cabling, switches
-
plus RDMA (RoCE and/or InfiniBand) at the protocol and debug level, Ethernet performance tooling (iperf, netperf, packet capture and analysis), and both front-end and back-end NICs and their differing traffic and scaling models
-
Experience with Linux networking internals, kernel/userspace drivers, and DPDK or verbs-level programming
-
Advanced degree (MS or PhD) in Electrical Engineering, Computer Engineering, or a related field
-
Familiarity with SerDes tuning, link margining, FEC, and errata characterization
-
Experience building large-scale lab automation frameworks and characterization data pipelines
-
Experience with AI/HPC back-end fabrics and collective communication traffic patterns
Public Compensation:
$212,000/year to $294,000/year + bonus + equity + benefits
Industry: Internet
Equal Opportunity:
Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.
Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at [email protected].
Similar jobs, posted recently
Open roles like this one, listed in the last 30 days.
Manager, Quantum Systems ValidationPsiQuantum · Milpitas, CA · $182–214K/yrPosted 3 days agoPosted 3 days ago
Technical Program Manager, Network EngineeringNVIDIA · Santa Clara, CA · $200–322K/yrPosted 1 day agoPosted 1 day ago
Silicon Validation EngineerNVIDIA · Santa Clara, CA (Hybrid) · $116–219K/yrPosted 3w agoPosted 3w ago
Technical Marketing Engineer, Cisco ValidatedCisco · Durham, NC (Hybrid) · $133–185K/yrPosted 2 days agoPosted 2 days ago
Senior RF Design EngineerSkydio · San Mateo, CA · $206–271K/yrPosted 3w agoPosted 3w ago
You've read the whole posting — now see how you match it.