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Senior Mask Design Engineer – Hardware

NVIDIA

Hsinchu, Hsinchu City, TaiwanFull-timePosted 3w agoStill listed today

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At a glance

Compensation
No compensation found
Location
Hsinchu, Hsinchu City, Taiwan
Schedule
Full-time
Work Authorization
Not specified

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Requirements

Credentials this posting asks for.

Bachelor's degree

Job overview

NVIDIA is seeking a hard‑working Senior Mask Design Engineer to collaborate with package technical leads and design teams, creating sophisticated silicon interposer layouts, conducting feasibility studies, and addressing cost, manufacturing, and electrical design challenges.

Skills & qualifications

RequiredNice to have

Skills

Cadence Layout ToolsVirtuosoCalibreICVThunderPerlPythonSkillDRCLVSIntegrity Auto‑RoutingAPD Package Layout Tool

Qualifications

Bachelor's in Electrical Engineering5+ Years Mask and Layout Design Experience

Full job description

NVIDIA’s GPUs and SOCs are the world leaders in power, performance, and efficiency. We are continually innovating to deliver new and creative, unusual solutions to extraordinary problems in a wide range of sectors. To this purpose, we are now seeking a hard-working Senior Mask Design Engineer who is committed to making a difference in the world through their contributions!

This position will collaborate with Package Technical Lead and different design teams in designing and developing sophisticated, detailed layout of silicon interposers for NVIDIA products. In addition, work with design teams to plan schedules, resolve costs, manufacturing, and electrical design issues.

What you'll be doing:

  • You'll collaborate cross functionally with package technical lead (PTL) and I/O signal integrity and technology engineers to deliver solution for product packages in tight schedule.

  • Performing physical layout for silicon interposer using Cadence tools.

  • Conduct design feasibility studies to evaluate the package design goals for size, cost, and system performance.

  • Take part in studying layout floorplan and perform custom layout and verification against design rules and netlists.

  • Propose layout design trade-offs to the PTL for resolution and implementation.

​What we need to see:

  • Hold a B.S. Electrical Engineering or equivalent experience

  • Minimum of 5+ years proven experience in Mask and Layout Design.

  • Deep understanding of layout concepts in submicron CMOS technologies.

  • You are an authority with Cadence layout tools - particularly Virtuoso.

  • Knowledge of Integrity auto-routing is a plus.

  • Experience running and debugging with verification tools such as Calibre, ICV, Thunder, etc.

  • Proficient in scripting languages like Perl, Python, Skill, etc.

  • Should have knowledge of DRC and LVS checking flows, ability to customize decks. Knowledge of APD package layout tool is a plus.

With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the most desirable employers in the world. We have some of the most brilliant and talented people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you.

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