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FPGA/Embedded Hardware Design Engineer

SAIC

College Park, MDJob$200–240K/yrSeen 2 days agoSeen in employer's feed 2 days ago

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At a glance

Compensation
$200–240K/yr
Location
College Park, MD
Work Authorization
US work authorization required

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Requirements

Credentials this posting asks for.

TS/SCI clearance

Job overview

SAIC seeks an experienced FPGA/embedded-systems engineer to design, verify, and integrate digital processing architectures. The role focuses on FPGA development, embedded software, digital signal processing, timing closure, and Linux-based workflows, delivering production-ready designs. The posting describes work with Xilinx devices and toolchains, SDR platforms, embedded Linux, and automated development workflows. Versal experience is a strong plus.

Skills & qualifications

RequiredNice to have

Skills

VHDLVerilogXilinx UltraScale+ MPSoCFPGA SimulationTestbench DevelopmentTclShell ScriptingStreaming Data PathsFIFO StructuresClock Domain CrossingCircular BuffersClocking ArchitecturesTiming ConstraintsWaveform AnalysisHardware DebuggingLogic AnalyzersCC++PythonDSP Algorithm DesignEttus USRPEpiq MatchstiqPluto SDRMicrocontroller Firmware DesignLinuxBashXilinx VivadoXilinx VitisHardware ManagerIP IntegratorIP PackagingXSimAldec Riviera ProModelSimYoctoFlexLMAI/ML Code AssistantsGitVersal Devices

Qualifications

BS+14, MS+12 or PhD/JD+9 YrsAdditional Experience for DegreeActive TS/SCI With PolygraphU.S. Citizenship

Full job description

Description

SAIC is seeking an experienced FPGA/Embedded-Systems Engineer to design, verify, and integrate advanced digital processing architectures. The ideal candidate will possess strong FPGA development experience using VHDL and Verilog, along with embedded software skills and a deep understanding of digital signal processing, timing closure, and Linux-based workflows. This role requires the ability to solve complex technical problems and deliver robust production-ready designs.

Qualifications

Key Responsibilities:

  • Develop FPGA architectures using VHDL-2019, VHDL-2008, VHDL, and basic Verilog as required.

  • Design solutions targeting Xilinx UltraScale+ MPSoC devices; experience with Versal devices is a strong plus.

  • Create self-checking simulation constructs and testbenches to validate functional and corner-case behavior.

  • Script simulation, synthesis, and implementation workflows using Tcl and shell scripting to automate toolflows.

  • Implement high-throughput streaming data paths, including FIFO structures, CDC mechanisms, circular buffers, clocking architectures, and timing constraints.

  • Perform FPGA debug through HDL simulation, waveform analysis, hardware debugging, and logic analyzer tools.

  • Develop and debug embedded software in C, C++, Python, and related languages to interface with FPGA logic.

  • Contribute to DSP algorithm design when needed, depending on project requirements.

  • Work with SDR platforms such as Ettus USRP, Epiq Matchstiq, and Pluto SDR to support system-level development.

  • Apply knowledge of microcontroller firmware design for supporting embedded subsystems.

  • Develop on Linux systems and write automation scripts using Bash.

  • Use Xilinx Vivado and Vitis toolchains including Hardware Manager, IP Integrator, IP packaging, and XSim simulation.

  • Simulate HDL using tools such as Aldec Riviera Pro and ModelSim for detailed design verification.

  • Build customized embedded Linux distributions for MPSoC and Versal devices using Yocto.

  • Set up and debug FlexLM license servers as part of maintaining development environments.

  • Leverage AI/ML code assistants to enhance development efficiency when appropriate.

  • Use Git for version control and collaborative software and FPGA development.

Required Education:

Bachelors and fourteen (14) years or more experience; Masters and twelve (12) years or more experience; PhD or JD and nine (9) years or more experience.

  • Additional experience may be substituted for a degree

Clearance Requirement:

  • Must be a U.S. citizen with an active TS/SCI with Polygraph level clearance

Target salary range: $200,001 - $240,000. The estimate displayed represents the typical salary range for this position based on experience and other factors.

REQNUMBER: 2618062

SAIC is a premier technology integrator, solving our nation's most complex modernization and systems engineering challenges across the defense, space, federal civilian, and intelligence markets. Our robust portfolio of offerings includes high-end solutions in systems engineering and integration; enterprise IT, including cloud services; cyber; software; advanced analytics and simulation; and training. We are a team of 23,000 strong driven by mission, united purpose, and inspired by opportunity. Headquartered in Reston, Virginia, SAIC has annual revenues of approximately $6.5 billion. For more information, visit saic.com. For information on the benefits SAIC offers, see Working at SAIC. EOE AA M/F/Vet/Disability

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