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Senior Performance Co-Design Engineer, Google Cloud TPU

Google

Sunnyvale, CAJob$163–236K/yrSeen 3w ago

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At a glance

Compensation
$163–236K/yr
Location
Sunnyvale, CA
Work Authorization
Not specified

Olive lists jobs from US employers, including remote roles you can work from the United States.

Job overview

The Senior Performance Co-Design Engineer will analyze and optimize serving performance of emerging models on Google’s custom hardware, working with hardware architects to shape future ML accelerators. The role focuses on performance studies, simulation, profiling, and modeling for LLM workloads, and on co-designing architectural improvements for inference latency and throughput. The team develops custom TPU silicon for machine learning applications.

Skills & qualifications

RequiredNice to have

Skills

Performance ModelingPerformance EngineeringComputer ArchitectureCodesignSystems EngineeringC++PythonHardware/Software CodesignPerformance AnalysisML Model OptimizationML InfrastructureProfiling ToolsDeep Learning Inference OptimizationServing OptimizationAccelerator Architectures

Qualifications

Bachelor's in Electrical Engineering, Computer Engineering, Computer Science or Related Field or Equivalent Practical Experience8 Years Performance Modeling/Engineering, Computer Architecture, Codesign or Systems Engineering ExperienceMaster's or PhD in Electrical Engineering, Computer Engineering or Computer Science

Full job description

Senior Performance Co-Design Engineer, Google Cloud TPU

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Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area.

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XIn most instances, this position requires in-person interviews as part of the hiring process.

Minimum qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.

  • 8 years of experience in performance modeling/engineering, computer architecture, codesign, or systems engineering.

  • Experience programming in C++ or Python.

Preferred qualifications:

  • Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.

  • Experience with hardware/software co-design problems, especially performance analysis and identification at the pre-silicon stage.

  • Experience enabling and optimizing ML models (e.g., LLMs, large embedding models).

  • Experience with ML infrastructure, profiling tools, or deep learning inference/serving optimizations.

  • Familiarity with accelerator architectures.

About the job

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

The Tensor Processing Unit (TPU) Chip Architecture and Performance Codesign team is at the forefront of optimizing Google's custom AI silicon for next-generation machine learning models.

As a Senior Performance Co-Design Engineer, you will focus on analyzing and optimizing the serving performance of emerging models and use cases on our custom hardware. You will also work closely with hardware architects to influence the evolution of Google’s custom ML accelerators.

The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.

Individual pay is determined by factors including job-related skills, experience, and relevant education or training.

US: $163000 - $236000 (USD) + 15% bonus target + equity + benefits

Learn more aboutbenefits at Google (https://www.google.com/about/careers/applications/benefits/) .

Responsibilities

  • Conduct comprehensive serving performance studies on current and emerging first-party and third-party LLMs.

  • Develop and maintain advanced simulation, profiling, and modeling tools to identify bottlenecks, understand key characteristics, and project serving workload performance.

  • Partner with model researchers, software teams, and hardware teams to co-design architectural improvements tailored to Large Language Model (LLM) inference latency and throughput.

  • Drive data-backed decisions that influence the roadmap for future TPU and Cloud Silicon architectures.

Information collected and processed as part of your Google Careers profile, and any job applications you choose to submit is subject to Google'sApplicant and Candidate Privacy Policy (./privacy-policy) .

Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law. See alsoGoogle's EEO Policy (https://www.google.com/about/careers/applications/eeo/) ,Know your rights: workplace discrimination is illegal (https://careers.google.com/jobs/dist/legal/EEOC\_KnowYourRights\_10\_20.pdf) ,Belonging at Google (https://about.google/belonging/) , andHow we hire (https://careers.google.com/how-we-hire/) .

If you have a need that requires accommodation, please let us know by completing ourAccommodations for Applicants form (https://goo.gl/forms/aBt6Pu71i1kzpLHe2) .

Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.

To all recruitment agencies: Google does not accept agency resumes. Please do not forward resumes to our jobs alias, Google employees, or any other organization location. Google is not responsible for any fees related to unsolicited resumes.

Equity is granted exclusively and discretionarily by Alphabet Inc. on the basis of an agreement concluded between you and Alphabet Inc. Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not guaranteed, are discretionary, are subject to approval by the Alphabet Inc. board of directors or its delegate, the terms of the relevant Alphabet Inc. stock plan, and your grant agreement. They have no impact on statutory payments. Current or past grants do not confer an acquired right.

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also https://careers.google.com/eeo/ and https://careers.google.com/jobs/dist/legal/OFCCP_EEO_Post.pdf If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form: https://goo.gl/forms/aBt6Pu71i1kzpLHe2.

How this job compares

Set against the 2,947 open Hardware Engineer jobs on Olive Jobs, counted October 29, 2026.

Pay
  • This posting$163–236K/yr
  • California median$146–214K/yr906 salary ranges
  • US median$131–201K/yr2,158 salary ranges

This range's midpoint, $200K, is 12% above the California median midpoint ($178K) — in the middle half of Hardware Engineer salary ranges in California.

Openings
Olive Jobs lists 1,197 open Hardware Engineer jobs in California and 2,947 across the US. 1% of them nationwide are listed as remote or flexible.
Hiring the most in California
Experience
This posting asks for at least 8 years of experience; Hardware Engineer postings that state a minimum ask for 5 years at the median (2,476 postings).
Education
1,840 of the 2,947 open Hardware Engineer jobs (62%) ask for a bachelor's degree or higher.

Counted across the open, public US postings on Olive Jobs on October 29, 2026. Pay medians are the middle values of the low ends and of the high ends of postings that list both ends of a range in the same cadence (a yearly salary or an hourly rate); a range's midpoint is halfway between its ends. Pay and experience figures resting on fewer than 20 postings are left out.

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