Hardware Engineer, TPU Interconnect and Packaging

Hardware Engineer, TPU Interconnect and Packaging

Share Hardware Engineer, TPU Interconnect and Packaging

corporate_fare Google place Sunnyvale, CA, USA

Advanced

Experience owning outcomes and decision making, solving ambiguous problems and influencing stakeholders; deep expertise in domain.

Share Hardware Engineer, TPU Interconnect and Packaging

info_outline

XIn most instances, this position requires in-person interviews as part of the hiring process.

Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.

• 10 years of experience with semiconductor packaging, integration, or interconnect design.

• Experience with interconnect modeling, 2.5D/3D interposer design rules, or chiplet package assembly.

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.

• Experience leading complex package development programs for high-performance computing (HPC) or AI accelerator platforms.

• Experience in silicon photonics integration, Co-Packaged Optics (CPO), 2.5D silicon interposers, and high-density substrate routing.

• Knowledge of wafer-level packaging (WLP), chiplet interconnect standards, dynamic thermal control, and high-density power delivery networks.

• Ability to deliver first-of-a-kind optical packaging or heterogeneous 3D integration solutions into production systems.

About the job

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

As a Hardware Engineer in the Interconnect and Packaging team, you will serve as a technical lead driving the architectural strategy, co-design methodologies, and technology roadmaps for TPU interconnects and optical packaging. You will bridge hardware architecture with foundry manufacturing capability, leading cross-functional teams across silicon photonics, high-density substrates, and system integration to deliver multi-terabit packaging capabilities.

The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.

Individual pay is determined by factors including job-related skills, experience, and relevant education or training.

US: $192000 - $278000 (USD) + 20% bonus target + equity + benefits

Learn more aboutbenefits at Google (https://www.google.com/about/careers/applications/benefits/) .

Responsibilities

• Define the architectural strategy and package technology selection for next-generation TPU systems, incorporating 2.5D/3D interposers, embedded bridges, and CPO modules.

• Drive electro-optical co-design across silicon photonics dies, laser sources, package substrates, and drive electronics to maximize interconnect bandwidth density and energy efficiency.

• Establish signal integrity, power delivery, thermal management, and mechanical robustness design rules across multi-chiplet heterogeneous assemblies.

• Partner with OSAT vendors, foundries, and optical component suppliers to co-develop custom substrate processes, sub-micron alignment flows, and optical coupling interfaces.

• Lead full-lifecycle technology qualification from pathfinding and architectural simulation through to mass production readiness.

Information collected and processed as part of your Google Careers profile, and any job applications you choose to submit is subject to Google'sApplicant and Candidate Privacy Policy (./privacy-policy) .

Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law. See alsoGoogle's EEO Policy (https://www.google.com/about/careers/applications/eeo/) ,Know your rights: workplace discrimination is illegal (https://careers.google.com/jobs/dist/legal/EEOC\_KnowYourRights\_10\_20.pdf) ,Belonging at Google (https://about.google/belonging/) , andHow we hire (https://careers.google.com/how-we-hire/) .

If you have a need that requires accommodation, please let us know by completing ourAccommodations for Applicants form (https://goo.gl/forms/aBt6Pu71i1kzpLHe2) .

Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.

To all recruitment agencies: Google does not accept agency resumes. Please do not forward resumes to our jobs alias, Google employees, or any other organization location. Google is not responsible for any fees related to unsolicited resumes.

Equity is granted exclusively and discretionarily by Alphabet Inc. on the basis of an agreement concluded between you and Alphabet Inc. Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not guaranteed, are discretionary, are subject to approval by the Alphabet Inc. board of directors or its delegate, the terms of the relevant Alphabet Inc. stock plan, and your grant agreement. They have no impact on statutory payments. Current or past grants do not confer an acquired right.

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also https://careers.google.com/eeo/ and https://careers.google.com/jobs/dist/legal/OFCCP_EEO_Post.pdf If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form: https://goo.gl/forms/aBt6Pu71i1kzpLHe2.