
Mixed-Signal Verification Engineer
Sunnyvale, CAJobSeen 5 days agoSeen in employer's feed 5 days ago
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Job overview
Apple’s wireless silicon development team is seeking a Mixed-Signal Design Verification Engineer to verify RF and mixed-signal blocks and interfaces within a wireless SoC. The role works with analog/RF design, digital design verification, digital design, and wireless systems teams to develop verification methodologies that ensure silicon-correct functionality while balancing coverage and time to tapeout.
Skills & qualifications
Skills
Qualifications
Full job description
Role Number: 200688947-3956
Summary
Come join Apple’s growing wireless silicon development team. Our wireless SOC organization is responsible for all aspects of wireless silicon development with a particular emphasis on highly energy efficient design and new technologies that transform the user experience at the product level. All of which is driven by a world-class vertically integrated engineering team, spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation and FW/SW engineering.
Description
In this highly visible role, you will be at the center of a wireless Mixed-Signal silicon design group, with a critical impact on getting innovative and functional products to hundreds of millions of customers quickly.
As a Mixed Signal Design Verification Engineer, you will be responsible for the verification of RF and mixed-signal blocks and their interfaces within the wireless SoC. You will interact with the analog/RF design team, digital DV team digital design team, and wireless system team to develop best-in-class verification methodologies that ensure silicon-correct functionality with optimal coverage and time-to-tapeout trade-off.
Minimum Qualifications
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Minimum requirement of a bachelors degree
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Industry verification experience with RF/Mixed-Signal blocks and SOCs
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Expertise building Mixed-Signal testbenches, checkers and tests using System Verilog
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Experience in UVM methodology and HDL (System Verilog, Verilog) for verification
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Strong verification skills in problem solving, testing, and debugging
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Understanding of common analog/RF blocks
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Experience with UPF, Python or Matlab
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Experience with Virtuoso Composer, ADE, and HED
Preferred Qualifications
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Bachelor degree in technical disciplines with 2+ years of relevant industry experience.
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Expertise creating and using real-numbered analog behavioral models in System Verilog
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Wireless experience
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Ability to work well in a team and be productive under aggressive schedule
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Excellent communication skills, self-motivation/organization and the desire to take diverse challenges.
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
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