
2027 Internship - Design Verification Engineer
Mesa, AZ · HybridFull-timeSeen todaySeen in employer's feed today
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Job overview
Cirrus Logic is seeking interns for its Mixed-Signal Verification Engineering team for Spring, Summer, and Fall 2027. Interns will support functional verification of mixed-signal products and work with digital and analog designers, applications engineers, and manufacturing test teams on pre-silicon verification and post-silicon validation. Internships last 12–16 weeks and follow a full-time schedule.
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Full job description
This job was posted by https://www.azjobconnection.gov : For more information, please see: https://www.azjobconnection.gov/jobs/7613834 For over four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal processing. Our rockstar team thrives on solving complex challenges with innovative end-user solutions for the world's top consumer brands. Cirrus Logic is also known for its award-winning culture, which was built on a foundation of inclusion and fairness, meaningful community engagement, and delivering enjoyable employee experiences at every turn. But we couldnt do it without our extraordinary workforce and thats where you come in. Join our team and help us continue to make Cirrus Logic an exceptional place to grow your career!\ \ We are seekinghighly motivated internsto join our Mixed-Signal Verification Engineering teamto support thefunctional verificationof industry-leading mixed-signal products. This internship offers a unique opportunity to work closely withdigital and analog designers,applications engineers, andmanufacturing test teamsto ensure robust product performance through bothpre-silicon verificationandpost-silicon validation.\ We recruit interns year-round for Spring, Summer, and Fall 2027 opportunities. Each internship lasts 1216 weeks and follows a full-time schedule.\ \ Responsibilities\ \ Assist inverification planningand strategy development.\ \ Supporttestbench creation, maintenance, and enhancement.\ \ Contribute tofailure analysis, debug, and resolution efforts.\ \ Help withcoverage analysisand population to ensure thorough verification of mixed-signal products.\ \ Work ondigital/mixed-signal modeling,directed and constraint-random test generation, andverification flow development.\ \ Required Skills and Qualifications\ \ Currently pursuing a MS or PhD in Electrical Engineering or a related field.\ \ Strong background inHardware Description Languages (HDLs)such asVerilogorVHDL.\ \ Familiarity withHardware Verification Languages (HVLs)likeSystemVerilog/UVM,Vera, ore.\ \ Solid understanding ofdigital design fundamentalsand verification methodologies.\ \ #LI-Hybrid\ \ Cirrus Logic follows a 2+ day in-office work schedule but interns should expect to be in the office more often, up to 5 days per week, based on business needs and team preference. Interns must be based within commutable distance of the work location listed on the job posting, or willing to relocate prior to beginning their internship with Cirrus Logic.\ \ Export control restrictions based upon applicable laws and regulations would prohibit candidates who are nationals of certain embargoed countries from working in this position without Cirrus Logic first obtaining an export license. Candidates for this role must be able to access technical data without a requirement for an export license. We are unable to sponsor or obtain export licenses for this role.\ \ Cirrus Logic strives to select the best qualified applicant for any opening. Different approaches, ideas and points of view are both valued and respected. Employment decisions are made on the basis of job-related criteria without regard to race, color, religion, sex, national origin, age, protected veteran or disabled status, genetic information, or any other classification protected by applicable law.
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