Technology Architecture Engineering Intern (Summer 2027)

About GlobalFoundries GlobalFoundries (GF) is a leading manufacturer of essential semiconductors, enabling AI at scale from the cloud to the physical world. Through deep partnerships with customers, GF delivers differentiated, power efficient and high performance solutions for high growth markets. GF is a trusted and holistic technology partner for customers around the world. GF's talented, global team remains focused every day on security, longevity and sustainability. For more information, visit www.gf.com. Internship Program Overview: Our Interns & Co-ops are our entry-level talent pipeline for GF across the globe. Our goal is to provide students with a meaningful work experience that will equip them with the skills to embark on a career in the fast-paced and growing semiconductor industry after graduation. As an intern at GF, you'll experience one-on-one mentorship, work assignments that prioritize your growth and potential, professional development opportunities, and the chance to network with executives. Summary of Role: Work with the Technology Architecture and Competitiveness Structural Analysis (TAC_SA) team to strengthen technology competitiveness through reverse engineering analysis, design compaction innovation, design migration techniques, and technology definition optimization. The intern will collaborate with design, tear-down, and laboratory teams to generate technical insights, improve analysis workflows, and support data-driven technology and market assessments. Essential Responsibilities include: Conduct reverse engineering analyses and structured technical investigations of semiconductor technologies, coordinating sample preparation, data collection, and analysis activities with Tear Down support and laboratory teams. Organize and interpret structural, layout, and technology findings; document methods, assumptions, and results; and prepare clear technical reports and presentations that support requester and market-analysis needs. Support design teams by applying design migration and layout-analysis tools to evaluate technology options, compare design-rule impacts, and identify opportunities for design compaction and optimization. Develop or improve scripts and repeatable workflows that increase the efficiency, consistency, and traceability of analysis and design-migration activities, including opportunities to apply Python and AI-enabled techniques. Collaborate with cross-functional engineering partners to review results, resolve data or methodology gaps, and communicate project status, risks, and recommended next steps. Other Responsibilities: Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs. Required Qualifications: Education - At least a sophomore at time of application and actively pursuing a Bachelor's in Physics, Electrical Engineering, or related field through an accredited degree program during the time of internship. Must have at least an overall 3.0 GPA and be in good academic standing. Language Fluency - English (Written & Verbal) Ability to work at least 40 hours per week during the internship. Preferred Qualifications: Prior related internship or co-op experience Demonstrated prior leadership experience in the workplace, school projects, competitions, etc. Strong interest in leveraging AI tools and emerging technologies to enhance productivity, streamline workflows, and support effective decision-making. Project management skills, i.e., the ability to innovate and execute on solutions that matter; the ability to navigate ambiguity. Strong written and verbal communication skills Strong planning & organizational skills Understanding of fundamental semiconductor device operation, basic circuit design, and related semiconductor processing technologies. Familiarity with electronic design automation and layout tools such as Cadence Virtuoso, KLayout, or Calibre. Familiarity with semiconductor de ign rules, stati