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Principal Optical Engineer

Yammer

CAJobPosted 1 day agoStill listed 1 day ago

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At a glance

Compensation
No compensation found
Location
CA
Work Authorization
Not specified

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Job overview

The Principal Optical Engineer will lead near-package and co-packaged optics architecture for hyperscale AI systems, guiding technologies from feasibility through qualification, manufacturing ramp, and deployment. The role owns multi-generation roadmaps, defines silicon-photonic subsystem architectures and system models, and provides hands-on laboratory leadership. It also drives cross-functional technical alignment, supplier and ecosystem engagement, product readiness, and communication of architectural decisions and risks.

Skills & qualifications

RequiredNice to have

Skills

Silicon PhotonicsVCSELsOptical EnginesNPOCPOOptical InterconnectsLaboratory CharacterizationPhotonic Device DebuggingOptical Link TestingOptical Test EquipmentHigh-Speed Electrical TestingData AnalysisArchitecture LeadershipProduct DevelopmentRequirements OwnershipDesign TradeoffsTechnical ReviewsValidationIssue ResolutionTechnical CommunicationCross-Functional CollaborationSupplier CommunicationNPO ProductizationCPO ProductizationOptical I/OPhotonic PackagingOptical CouplingFiber AttachThermal DesignMechanical TolerancesAssembly ProcessesPackage-Level TestingSilicon Photonic IntegrationModulatorsPhotodetectorsWaveguidesCouplersMultiplexersLaser IntegrationProcess Variation

Qualifications

Master's in Electrical Engineering or RelatedBachelor's in Electrical Engineering or RelatedEquivalent Experience7+ Years Technical Engineering Experience8+ Years Technical Engineering ExperienceDoctorate+8, Master's+10, Bachelor's+14 or Equivalent

Full job description

This individual will serve as a technical leader for near-package optics (NPO), co-packaged optics (CPO), silicon photonics, and advanced packaging. The role will define multi-generation architectures and guide technologies from early feasibility through qualification, manufacturing ramp, and deployment in hyperscale AI systems. Own the end-to-end architecture and multi-generation roadmap for NPO and CPO optical interconnects used in AI scale-up networks. Translate system and network requirements into specifications for bandwidth density, reach, latency, energy per bit, optical-link budget, signal integrity, thermal limits, reliability, serviceability, manufacturability, and cost. Define silicon-photonic subsystem architectures, including optical engines, modulators, photodetectors, laser-source strategies, coupling interfaces, fiber attach, electronic-photonic integration, and control and monitoring functions. Build system models and budgets that connect photonic-device performance, SerDes and electrical channels, package parasitics, thermal behavior, controls, and network-level performance. Provide hands-on technical leadership in laboratory characterization and debug, including optical and electrical measurements, link bring-up, design-of-experiments, margin analysis, failure analysis, and correlation of simulation with measured data. Define verification, qualification, reliability, and manufacturing-test strategies at wafer, die, package, module, board, rack, and system levels Guide proof-of-concept designs through product definition, design reviews, qualification, manufacturing readiness, supply-chain ramp, and fleet deployment; lead root-cause and corrective-action efforts when issues arise. Drive technical alignment across silicon, packaging, signal integrity, thermal, mechanical, firmware, networking, manufacturing, and reliability teams. Set technical direction with foundries, OSATs, component suppliers, equipment vendors, and strategic partners; assess technology readiness, supply continuity, cost, yield, and roadmap alignment. Influence industry standards and ecosystem roadmaps, mentor engineers, and communicate complex architectural decisions and risks to technical and business leadership. Master's Degree in Electrical Engineering, Computer Engineering, Mechanical Engineering, or related field AND 7+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Mechanical Engineering, or related field AND 8+ years technical engineering experience OR equivalent experience. These requirements include, but are not limited to, the following specialized security screening: Technical experience architecting or developing silicon photonics, VCSELs, optical engines, NPO, CPO, or closely related optical interconnects products. Hands-on laboratory experience characterizing and debugging photonic devices, optical links, or integrated optical modules using relevant optical and high-speed electrical test equipment and data-analysis methods. Experience leading architecture or product development across multiple disciplines and phases of the lifecycle, with demonstrated ownership of requirements, design tradeoffs, technical reviews, validation, and issue resolution. Experience communicating technical decisions, risks, and recommendations to cross-functional engineering teams, suppliers, and stakeholders. Doctorate Degree in Electrical Engineering, Optical Engineering, Photonics, Applied Physics, Materials Science, Mechanical Engineering, or related field AND 8+ years of technical engineering experience OR Master's Degree in a related field AND 10+ years of technical engineering experience OR Bachelor's Degree in a related field AND 14+ years of technical engineering experience OR equivalent experience. Demonstrated ownership of NPO, CPO, or optical I/O from concept through productization or production deployment. Experience with advanced photonic or semiconductor packaging, including optical coupling and fiber attach, electrical interfaces, thermal design, mechanical tolerances, assembly processes, and package-level test considerations. Deep knowledge of silicon photonic components and integration, including modulators (MRM or MZM), photodetectors, waveguides, couplers, multiplexers, laser integration, process variation, wafer-level test, and photonic design-kit constraints. Expertise in heterogeneous integration and advanced packaging technologies such as chiplets, interposers, 2.5D/3D integration, flip-chip, hybrid bonding, high-density substrates, fine-pitch assembly, and co-design of optical, electrical, thermal, and mechanical interfaces. Experience with driver/TIA, package and board signal integrity, and end-to-end link-budget and power modeling. Experience defining DFT, wafer and package test, screening, qualification, reliability, failure-analysis, and high-volume manufacturing strategies for photonic or semiconductor products. Experience with AI infrastructure, GPU or accelerator fabrics, Ethernet, InfiniBand, UALink, NVLink or other high-bandwidth scale-up and scale-out interconnect ecosystems. Experience working with silicon foundries, photonics foundries, OSATs, laser suppliers, fiber-attach and connector vendors, and contract manufacturers to drive roadmap, yield, cost, and supply-chain readiness. Record of technical influence through standards bodies, industry consortia, patents, publications, or delivery of differentiated commercial products.

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