Hardware Engineer, AI Accelerator Power Design

Summary:

The ARD team designs accelerator reference platforms for Meta's AI hardware roadmap. This role owns the board-level power delivery system end to end for multi-kilowatt accelerator modules — DC/DC converter design and the PCB power delivery network, from topology and component selection through PDN architecture, stack-up, placement, layout, power integrity simulation, and lab correlation. You will work closely with ASIC, HW platform, thermal, SI/PI, and mechanical teams to co-design the power path, and directly with top-tier external partners and ODMs to drive designs from concept through production.

Required Skills:

Hardware Engineer, AI Accelerator Power Design Responsibilities:

1. Own the module power delivery system end to end: DC/DC topology and component selection, regulation scheme, and the PCB power delivery network

2. Set power specifications and efficiency targets for high-power ASIC loads

3. make component and architecture choices against space, thermal, cost, and production-reliability constraints

4. Own PCB physical design of the power path: PDN architecture and optimization, power plane design, stack-up definition, placement analysis, and power circuit layout best practices

5. Define and close power integrity targets through modeling and simulation (DC IR drop, AC impedance, transient response), and correlate simulation against lab measurements

6. Partner with ASIC teams on package/board co-design, including socket and interposer power path, current density, and on-die vs. on-board decoupling allocation

7. Lead board bring-up, validation, and debug of power rails

8. define measurement methodology for high-current, low-voltage rails

9. Drive design reviews with ODM/CM partners

10. establish layout and DFx best practices adopted across the broader team

11. Explore and develop leading-edge DC/DC and power delivery technologies (e.g., vertical power delivery, near-die power modules) with industry partners

12. Contribute to design guidelines, review checklists, and tooling that raise the quality bar across ARD

Minimum Qualifications:

Minimum Qualifications:

1. BS in Electrical Engineering or equivalent, plus 8+ years of hardware power design experience (MS + 6 years, or PhD + 4 years)

2. Multiple complex power designs taken to volume production, with ownership of both the converter design and the board-level power delivery path

3. DC/DC power electronics design experience: specification and requirement setting, topology and component selection, regulation scheme definition, and bring-up/validation/troubleshooting

4. Demonstrated efficiency design practice in high-power systems: setting efficiency targets, component selection for efficiency, and trade-offs under space and thermal limitations

5. Deep hands-on PCB physical design experience: PDN design and optimization, power plane design, stack-up definition, placement analysis, and power circuit layout best practices

6. Power integrity expertise: circuit modeling and simulation used to drive design iteration, with proven simulation-to-lab closure, and knowledge of where/how to measure power effectively in DC/DC designs

7. Experience with high-current, low-voltage rails and the decoupling/noise strategy for large digital loads (ASIC, SoC, GPU, or similar)

8. Proficiency with schematic capture and layout tools, and PI/PDN simulation tools (e.g., Ansys SIwave/Q3D, Cadence Sigrity, or equivalent)

9. Lab proficiency: oscilloscopes, electronic loads, thermal imaging, and measurement techniques appropriate to high-current power rails

10. Track record operating independently on ambiguous problems and driving cross-functional efforts to resolution without guidance

Preferred Qualifications:

Preferred Qualifications:

1. Experience supporting multiple complex programs in parallel, balancing competing schedules and priorities across concurrent design cycles

2. Experience with thermal/mechanical co-design in dense liquid-cooled or air-cooled modules

3. Experience with 1kW+ accelerator or ASIC-class power delivery, including 48V architectures

4. Experience defining team-wide design standards, review processes, or automation

5. Experience driving vendor and ODM development cycles end to end, including technology roadmap engagement with silicon and passive component suppliers

6. Experience with vertical power delivery, power modules integrated near-die, or backside power delivery concepts

7. Awareness of power delivery technology trends for 1kW-and-beyond ASICs

Public Compensation:

$173,000/year to $245,000/year + bonus + equity + benefits

Industry: Internet

Equal Opportunity:

Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.

Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at [email protected].