Electrical Engineer

We have an Excellent Contract position for anElectrical Engineer L5 to join a leading Company located inCampden, NJ.

Pay Rate: $65.00 - $75.00

US Citizenship is required.

Candidate must possess an active Secret Clearance or have the ability to obtain and maintain a Secret Security Clearance.

We are seeking anElectrical Engineer L5, a Senior Member of Engineering Staff (SMES), you will be part of the key design team, responsible for the delivery of FPGAs for defense applications. You will architect, implement FPGA design, with hands on design/debug with primarily Ethernet, I2C, SPI, AXI protocols. You will use state-of-the-art EDA flows/methodologies including Mentor EDA: Simulator Questa Prime, Verification IP (QVIPs), UVM framework, Clock Domain Crossing (CDC), Reset Domain Crossing (RDC), Questa Lint, Synopsys (DC/Primetime/Synplify), Xilinx/Intel/Microchip EDA (Vivado/Libero/Quartus). This is a high impact role in the organization to ensure robust quality and delivery of communication products for National Security.

Essential Functions:

• Derive FPGA design specifications from system requirements

• Develop detailed FPGA architecture for implementation

• Implement design in RTL (VHDL) and perform module level simulations

• Perform Synthesis, Place and Route (PAR) and Static Timing Analysis (STA)

• Perform RTL quality using: Lint, Reset Domain Crossing (RDC), Clock Domain Crossing (CDC) , Static Formal EDA

• Generate verification test plans and perform End to End Simulations

• Support Board, FPGA bring up

• Validate design through HW/SW integration test with test equipment

• Support product collateral for NSA certification

Qualifications:

• Bachelor of Science (BS) -Four year degree or Masters (MS) or PhD from an accredited course of study in engineering, engineering technology (chemistry, physics, mathematics, data science, or Electrical/Electronics/Computer Engineering/Computer Science)

• 5-7+ years' experience designing FPGA products with VHDL

• Experience with Xilinx FPGAs and Vivado

• Experience with Revision control system

• Experience with Earned Value Management (EVM)

• Good written, verbal, and presentation skills

• Active DoD Security Clearance

Preferred Additional Skills:

• Experience with mapping algorithms to architecture

• Experience in C++ (OOP)

• Experience with any of protocols : Ethernet, TCP/IP, PCIe, NVMe, USB

• Experience with Xilinx SoC design with SDKs and PetaLinux OS

• Experience with High-Level Synthesis (HLS) with Vivado HLX or Mentor Catapult

Benefits offered vary by contract. Depending on your temporary assignment, benefits may include direct deposit, free career counseling services, 401(k), select paid holidays, short-term disability insurance, skills training, employee referral bonus, and affordable medical coverage plan, and DailyPay (in some locations). For a full description of benefits available to you, be sure to talk with your recruiter.

Military connected talent encouraged to apply.

VEVRAA Federal Contractor / Request Priority Protected Veteran Referrals / Equal Opportunity Employer / Veterans / Disabled

To read our Candidate Privacy Information Statement, which explains how we will use your information, please visithttp://www.tadpgs.com/candidate-privacy/orhttps://pdsdefense.com/candidate-privacy/

The Company will consider qualified applicants with arrest and conviction records in accordance with federal, state, and local laws and/or security clearance requirements, including, as applicable:

• The California Fair Chance Act

• Los Angeles City Fair Chance Ordinance

• Los Angeles County Fair Chance Ordinance for Employers

• San Francisco Fair Chance Ordinance