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Wireless SoC Design Engineer

Apple

Irvine, CAJobSeen 1w agoSeen in employer's feed 1 day ago

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At a glance

Compensation
No compensation found
Location
Irvine, CA
Work Authorization
Not specified

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Requirements

Credentials this posting asks for.

Bachelor's degree

Job overview

The Wireless SoC Design Engineer will design CPU-based subsystems for high-performance, low-power wireless SoCs. The role works with SoC architects, IP developers, and software, firmware, and platform engineering teams to meet power, performance, and area goals. Responsibilities include hardware/software/power partitioning and integrating standard and custom hardware IPs into SoCs, contributing to ASIC design efforts for Apple devices.

Skills & qualifications

RequiredNice to have

Skills

ASIC Design FlowDigital DesignSoC ArchitectureVerilogMicro-Architecture SpecificationsDesign MethodologiesEDA ToolsAXI/AHB Bus FabricProcessor SubsystemsUPFLow-Power DesignSelf-StarterWillingness to Learn

Qualifications

BS With 10+ Years Relevant Experience

Full job description

Role Number: 200688940-1697

Summary

Come and join Apple’s growing wireless silicon development team. Our wireless SoC organization is responsible for all aspects of wireless silicon development, emphasizing highly energy-efficient design and new technologies that transform the user experience at the product level. All of this is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. If you enjoy a fast-paced and challenging environment, collaborate with people across different functional areas, and thrive during crisis times, we encourage you to apply.

Description

In this role you will work on a small team designing CPU-based subsystems for high performance, low power wireless SoCs. As a member of the team, you will work closely with SoC architects and IP developers to develop SoCs that meet the power, performance, and area goals for Apple devices, with a particular focus on low power metrics. You will engage in hardware/software/power partitioning discussions alongside software, firmware, and platform engineering teams. You will integrate industry standard and custom hardware IPs into SoCs. This is a highly visible role, where you will be at the center of the ASIC design efforts, collaborating with all fields, with a critical impact in getting leading-edge products launched to delight millions of customers.

Minimum Qualifications

  • BS with 10+ years relevant experience.

  • Familiarity with the ASIC design flow.

  • Knowledge of digital design, SoC architecture, and HDL languages like Verilog.

Preferred Qualifications

  • Shown experience writing micro-architecture specifications and converting them to design

  • Exposure to design methodologies and industry standard EDA tools.

  • Experience with AXI/AHB bus fabric and processor sub-systems.

  • Understanding of UPF and low-power design & implementation techniques.

  • Self-starter and willingness to learn.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.

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