Pre-Silicon Verification Engineer for AI
Los Altos, CAFull-timePosted 8mo agoStill listed 5 days ago
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Job overview
Majestic Labs ai is hiring a Pre-Silicon Verification Engineer for AI. Majestic Labs AI is seeking an experienced and highly skilled Pre-Silicon Verification Engineer to join its core team. This role involves chip-level and performance verification of custom ASICs. The engineer will collaborate with architecture teams to design end-to-end test flows and methodologies for real-world performance scenarios, and manage vendors or contractors as needed. The position focuses on cutting-edge AI technology and next-generation AI-driven computing solutions.
Key focus areas include Work with engineers and partners to verify ASICs, Work with architecture team to understand architecture, and Design end-to-end test flows and methodologies.
Successful candidates bring Bachelor's or Master's in Computer Science/Engineering, 5+ Years Verification Methodology Experience, and 5+ Years UVM Coding Experience. Important skills include VCS, Verdi, NCSim, Perl, Python, and Constrained Random Verification. Preferred (not required): LLMs, AI ASICs, Large-Scale Datacenter-Grade ASICs, and Performance Verification Of Compute ASICs.
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Full job description
Role Description:
We are looking for an experienced, highly skilled and motivated Pre-Silicon Verification Engineer to join our core team. In this role, you will be responsible for chip-level and performance verification of one of our custom ASICs.
What You’ll Do:
- Work with our engineers and partners to help verify our ASICs
- Work with our architecture team to understand our architecture and to design end-to-end test flows and methodologies to verify real-world performance scenarios
- Manage vendors and/or contractors as necessary
Requirements:
What We’re Looking For
- Bachelor’s or Master’s in Computer Science, Computer Engineering, or a related field from a recognized university
- Expert-level experience with simulation tools & flows (VCS, Verdi, NCSim and the like)
- Scripting experience in Perl and/or Python
- 5+ years experience using constrained random & functional coverage based verification methodologies on large design blocks
- 5+ years hands-on coding of UVM verification environments
- C/C++ expertise is a plus
- Excellent communication skills and a strong track record of cross-functional collaboration
Ways to stand out from the crowd
- Experience with and understanding of common LLMs
- Experience with AI or other large-scale datacenter-grade ASICs
- Experience doing performance verification of compute or networking ASICs
Why Join Us?
- Work on cutting-edge AI technology
- Collaborate with top-tier engineers in an innovative environment
- Develop next-generation AI-driven computing solutions
If you’re passionate about silicon development and AI-driven technologies, we’d love to hear from you! 🚀
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