FPGA Design Engineer, Senior Principal

Job Description

Be part of a new age where firmware and digital design shape technological advantages on the battlefield. Help empower pilots, soldiers, and operators by developing missioncritical systems that deliver stealth, protection, and nextgeneration electronic capabilities. Join the team that protects those who protect usat BAE Systems.

We are seeking a Sr. Principal FPGA Digital Design Engineer who brings strong technical leadership, initiative, and a drive to push the boundaries of what s possible. In this role, you will work crossfunctionally with hardware, software, and systems engineering teams, taking full ownership of highimpact design challenges from concept through delivery, and contributing innovative solutions to problems many consider unsolvable.

BAE Systems offers a modern, flexible work environment that supports worklife balanceincluding a 9days/80hours pay periodand a missionfocused culture where every design delivers realworld impact.

Role Responsibilities

• Support program proposal development by defining technical solutions, estimating effort and budget, and collaborating with systems, hardware, and software teams to align with customer requirements.

• Serve as an expert in advanced digital, FPGA, and systemlevel design by contributing to research initiatives that develop leadingedge concepts and establish new engineering platform solutions.

• Translate FPGA design requirements from systemlevel inputs in close collaboration with hardware, systems, and software teams to ensure seamless FPGA performance and integration.

• Architect and implement FPGA designs across major device families (Xilinx, Intel, Microchip, Lattice) using VHDL, supporting applications ranging from gigabitrate serial links and RF DSP to control loops, embedded processing, and processorlevel interfaces.

• Innovate with nextgeneration FPGA platforms (Xilinx Zynq SoC, RFSoC), use SystemVerilog, UVM, and digitaltwin cosimulation methodologies.

• Drive synthesis, placeandroute, static timing analysis, and overall design optimization.

• Build highquality test benches, simulation environments, and static verification setups (Lint, Autocheck, CDC, RDC).

• Lead handson lab integration, perform daily realtime testing, and incorporate direct feedback from flight test operations and end users.

• Support development workflows and participate in formal specification and design reviews.

• Manage version control and configuration processes using Git/GitLab while maintaining accurate, uptodate design documentation.

• Serve as a mentor to senior and junior design engineers and help strengthen overall team technical capability.

• Maintain full awareness of program schedules and budgets.

Required Education, Experience, & Skills

• BS degree in Electrical Engineering or related Science, Technology, Engineering and Mathematics (STEM) major obtained by start date.

• 8 years VHDL/Verilog expertise.

• Expertise in developing advanced concepts and innovative technical solutions.

• Expertise in clock domain crossing, timing analysis, revision control.

• Experience in hardware-software integration and validation.

• Familiarity with Xilinx, Intel, Microchip or Lattice devices and tool flows.

• Familiarity with the Linux environment and commands.

• Knowledge of C programming and scripting languages such as Perl, Tcl and Python.

• Demonstrated effective communication, collaboration, and presentation skills

• Must be a U.S. Citizen; must be able to obtain/maintain a DoD Secret clearance

Preferred Education, Experience, & Skills

• Advance knowledge of Digital Signal Processing

• Experience with architecture design in Matlab/Simulink.

• Experience with platforms as Vivado and Modelsim/QuestaSim.

• Experience with UVM/SystemVerilog, hardware debug.

• Experience with High-speed interfaces (PCIe).

• Proficiency in a Linux development environment.

• Proficiency using Git and CI/CD workflows.

• Knowledge of software programming languages such as C/ C .

• Experience with Xilinx/AMD and MicroSemi/Microchip part families, internal FPGA fabric, and IP.

• Previous experience related to aerospace design techniques.

• Active DoD Secret or Top Secret clearance.

Pay Information

Full-Time Salary Range: $132962 - $226035

Please note: This range is based on our market pay structures. However, individual salaries are determined by a variety of factors including, but not limited to: business considerations, local market conditions, and internal equity, as well as candidate qualifications, such as skills, education, and experience.

Employee Benefits: At BAE Systems, we support our employees in all aspects of their life, including their health and financial well-being. Regular employees scheduled to work 20 hours per week are offered: health, dental, and vision insurance; health savings accounts; a 401(k) savings plan; disability coverage; and life and accident insurance. We also have an employee assistance program, a legal plan, and other perks including discounts on things like home, auto, and pet insurance. Our leave programs include paid time off, paid holidays, as well as other types of leave, including paid parental, military, bereavement, and any applicable federal and state sick leave. Employees may participate in the company recognition program to receive monetary or non-monetary recognition awards. Other incentives may be available based on position level and/or job specifics.

FPGA Design Engineer, Senior Principal

130360BR

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