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Formal Verification Engineer

NVIDIA

Shanghai, Shanghai, ChinaFull-timePosted 1w agoStill listed today

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At a glance

Compensation
No compensation found
Location
Shanghai, Shanghai, China
Schedule
Full-time
Work Authorization
Not specified

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Requirements

Credentials this posting asks for.

Bachelor's degree

Job overview

NVIDIA's GPU clocks group seeks senior formal verification engineers to design, develop, and validate clocking RTL, collaborating with frontend and backend teams to meet complex design requirements across consumer graphics, self‑driving cars, and AI products.

Skills & qualifications

RequiredNice to have

Skills

Formal VerificationJasper GoldVC FormalTCLPerlPythonAbstraction TechniquesVerification MethodologyInterpersonal SkillsEnglish Communication

Qualifications

BS / MS in CS/CE/EE/Mathematics3+ Years ASIC Verification Experience

Full job description

The NVIDIA GPU clocks group is looking for excellent Senior Formal Verification engineers to join the team. The Team is responsible for crafting all aspects of GPU clocking. The team collaborates with the frontend design team to understand the clocking requirements for the chip. We also understand the physical restrictions being placed on the clocks by the backend teams. The GPU clocks group architects, designs and validates the clocks RTL. The complexity of clocks RTL has increased many folds to support our features that power our product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence.

What you’ll be doing:

  • Understand key design behaviors from formal verification view to write clear test plans, and implement them using the latest formal techniques, including the development of environment assumptions, assertions and cover properties.
  • Develop abstraction models to overcome complexity challenges and obtain full proofs, or bounded proofs with sufficient coverage.
  • Debug RTL to identify causes of failure scenarios and finish coverage sign-off.
  • Drive tools to realize their best performance.
  • Contribute to flow and script development to improve team efficiency.
  • Work with architects, designers and others to guarantee good deliverable quality.

What we need to see:

  • BS / MS in CS/CE/EE/Mathematics and related with 3+ years of ASIC verification experience.
  • Knowledge of formal verification methodologies and techniques, preferable experience with Formal Verification Tools (e.g. Jasper Gold, VC Formal ).
  • Able to implement abstraction techniques for effective verification.
  • Excellent command of scripting using TCL, Perl, and Python.
  • Familiar with verification methodology, tools and flow in Unit/Sub-system/SOC level.
  • Excellent interpersonal skills, able to effectively collaborate and work with members of a distributed team.

Ways to stand out from the crowd:

  • Excellent analytical and problem-solving skills, quick understanding to complex design or experience in different verification methodologies is plus.
  • Strong prior knowledge/experience in different protocols/data transmission verification is plus.
  • Fluent English (both written and spoken) and excellent communication skills.
  • Good teamwork spirit, easy to cooperate with team members.

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