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Physical Design, VLSI - New College Grad 2027

NVIDIA

Shanghai, Shanghai, ChinaFull-timePosted 1w agoStill listed 1w ago

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At a glance

Compensation
No compensation found
Location
Shanghai, Shanghai, China
Schedule
Full-time
Work Authorization
Not specified

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Requirements

Credentials this posting asks for.

Master's degree

Job overview

NVIDIA seeks a Physical Design Engineer for its Shanghai/Beijing office to work on GPU and mobile chip physical design, handling floorplanning, power and clock distribution, timing optimization, place and route, and verification while collaborating with RTL, DFT, and circuit designers.

Skills & qualifications

RequiredNice to have

Skills

Synopsys ICC2Synopsys DCSynopsys PTSynopsys STAR-RCCadence EDICadence InnovusCadence VoltusMentor Olympus-SOCClock/Power DistributionPlace & RouteTiming ClosureRC ExtractionPhysical VerificationFinFET TechnologyCircuit DesignPackage DesignPerlPythonTCLMakefile Scripts

Qualifications

Master in Engineering or Science

Full job description

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 30 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. We are now looking for Physical Design Engineer in Shanghai/Beijing office.

What you will be doing: A role in physical design for NVIDIA GPU and Mobile chips. Participate in various aspects of physical design, including full chip floorplanning, power/clock distribution, timing optimization, place & route, timing closure, power/signal integrity analysis, and physical verification. Troubleshoot a wide variety of design and flow complicated issues, and apply proactive intervention. Collaborate with RTL, DFT and Circuit designers to ensure high quality of design implementation.

What we need to see:

  • Master in Engineering or Science

  • Power user of EDA tools from Synopsys (ICC2/DC/PT/STAR-RC), Cadence (EDI/Innovus/Voltus) or Mentor (Olympus-SOC)

  • Experience in Clock/Power Distribution, P&R, Timing closure, RC Extraction, and verification on advanced technology nodes

Ways to stand out from the crowd:

  • Knowledge in FinFET technology, circuit design, and package design

  • Experience in physical verification tools from Synopsys (ICV) or Mentor (Calibre)

  • Proficiency in Perl, Python, TCL and Makefile scripts

NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

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