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Senior Power Management IP Verification & Validation Engineer

SambaNova

San Jose, CAFull-time$250–350K/yrPosted todayVerified open today

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At a glance

Compensation
$250–350K/yr
Location
San Jose, CA
Schedule
Full-time
Work Authorization
Not specified

Requirements

Credentials this posting asks for.

Master's degree

Job overview

SambaNova seeks a Senior Power Management IP Verification & Validation Engineer to lead pre‑silicon verification and post‑silicon validation of power IPs for its AI accelerator chips, collaborating closely with RTL designers and applying UVM, SVA, and SystemVerilog methodologies.

Skills & qualifications

RequiredNice to have

Skills

SystemVerilogUVMSVAC++PythonShell ScriptingHardware ValidationDebuggingTestingTechnical CommunicationCross‑Functional Collaboration

Qualifications

Master's or Ph.D. In Electrical Engineering, Computer Engineering, or Computer Architecture7+ Years Experience in Verification and Post‑Silicon Validation for Hardware AcceleratorsDomain Knowledge of Power Management, RDU Architecture, and Computer Architecture Fundamentals

Benefits

Medical Insurance
Dental Insurance
Vision Insurance

Full job description

The era of pervasive AI has arrived. In this era, organizations will use generative AI to unlock hidden value in their data, accelerate processes, reduce costs, drive efficiency and innovation to fundamentally transform their businesses and operations at scale.

SambaNova Suite™ is the first full-stack, generative AI platform, from chip to model, optimized for enterprise and government organizations. Powered by the intelligent SN40L chip, the SambaNova Suite is a fully integrated platform, delivered on-premises or in the cloud, combined with state-of-the-art open-source models that can be easily and securely fine-tuned using customer data for greater accuracy. Once adapted with customer data, customers retain model ownership in perpetuity, so they can turn generative AI into one of their most valuable assets.

About the role

The VLSI Power Engineer role at SambaNova Systems requires a Master's or Ph.D. degree along with 7+ years of experience in verification and post-silicon validation for hardware accelerators. The ideal candidate has a solid grasp of computer architecture fundamentals to understand the intricacies of the Reconfigurable Dataflow Unit (RDU) architecture, since this role owns verification of the power management system that is tightly coupled to the RDU across both pre-silicon and post-silicon stages. The engineer will be responsible for delivering a bug-free design in close collaboration with RTL design teams, applying industry-standard verification methodologies such as UVM and SVA. Beyond pre-silicon work, the role extends into silicon bring-up, validation, and testing. Candidates should bring strong proficiency in SystemVerilog, along with working proficiency in C/C++, Python, and shell scripting to build and maintain verification flows and tooling.

Responsibilities

  • Define and plan pre-silicon verification strategy during the early stages of the project

  • Execute pre-silicon verification of Power IPs, driving toward high functional and code coverage targets

  • Following chip arrival, lead functional and system-level validation efforts of Power IPs to support low-power, high-performance rack system delivery

Required Qualifications

  • Master's or Ph.D. in Electrical Engineering, Computer Engineering, or Computer Architecture

  • 7+ years of experience in verification and post-silicon validation for hardware accelerators

  • Hands-on experience with UVM and SVA in a SystemVerilog verification environment

  • Hands-on experience with hardware validation, debugging, and testing

  • Strong cross-functional collaboration and technical communication skills to effectively bridge RTL design and pre-silicon verification/post-silicon validation teams

Preferred Qualifications

  • Domain knowledge of power management, RDU architecture, and computer architecture fundamentals

  • Experience leveraging modern AI tools and AI-assisted workflows (e.g., for Python/Bash scripting) to automate flows, boost productivity, and streamline simulation post-processing

Base Salary Range:

Base Pay Range $250,000—$350,000 USD

Submission Guidelines Please note that in order to be considered an applicant for any position at SambaNova Systems, you must submit an application form for each position for which you believe you are qualified.

EEO Policy SambaNova Systems is an Equal Opportunity/Affirmative Action Employer. All qualified applicants will receive consideration for employment without regard basis of age (40 and over), color, disability, gender identity, genetic information, marital status, military or veteran status, national origin/ancestry, race, religion, creed, sex (including pregnancy, childbirth, breastfeeding), sexual orientation, and any other applicable status protected by federal, state, or local laws.

Benefits Summary for US-Based, Full-Time Employment Positions SambaNova offers a competitive total rewards package, including the base salary, plus equity and benefits. We cover 95% premium coverage for employee medical insurance, and 77% premium coverage for dependents and offer a Health Savings Account (HSA) with employer contribution. We also offer Dental, Vision, Short/Long term Disability, Basic Life, Voluntary Life, and AD&D insurance plans in addition to Flexible Spending Account (FSA) options like Health Care, Limited Purpose, and Dependent Care. Our library of well-being benefits available to you and your dependents includes a full subscription to Headspace, Gympass+ membership with access to physical gyms, One Medical membership, counseling services with an Employee Assistance Program, and much more.

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