
Signal and Power Integrity Engineer (SI/PI)
Cupertino, CAJobSeen 1 day agoSeen in employer's feed 1 day ago
Most applications go out cold — see where you stand first. No sign-up to start.
Watch jobs like this. New roles like this one near Cupertino, CA, by email.
Don't just apply. Show up ready.
Olive works from this exact posting.
At a glance
Olive lists jobs from US employers, including remote roles you can work from the United States.
Requirements
Credentials this posting asks for.
Job overview
Apple is seeking an early career signal and power integrity (SI/PI) engineer to support architectural exploration and product development, handling high‑speed and low‑speed interfaces, power delivery network analysis, and cross‑functional collaboration on I/O and power architecture.
Skills & qualifications
Skills
Qualifications
Full job description
Weekly Hours: 40
Role Number: 200686584-0836
Summary
We’re a diverse collection of thinkers and doers, continually reimagining what’s possible to help us all do what we love in new ways. The people who work here have reinvented entire industries with the Mac, iPhone, iPad, and Apple Watch, as well as with services, including iTunes, the App Store, Apple Music, and Apple Pay. And the same passion for innovation that goes into our products also applies to our practices — strengthening our commitment to leave the world better than we found it! We are seeking an early career signal and power integrity (SI/PI) engineer with outstanding track record in supporting both architectural exploration and product development. An ideal candidate should be highly skilled in all major aspects of SI/PI, including high speed links (e.g. PCIe, USB, DP, MIPI, etc.), low speed buses (e.g. SPMI, SPI, I2C, I2S, SoundWire, etc.), and system power delivery network (PDN) analysis. You will play an integral role in developing innovative technologies and new products.
Description
System-level SI simulation and design evaluation, including but not limited to PCB stackup, placement/routing, connector and analog/digital IO selection. System-level PI simulation and design evaluation, including but not limited to power/ground plane optimization, decoupling cap strategy, transient/frequency-domain noise analysis, EMI mitigation, and noise immunity enhancement. Work with cross-functional teams to define I/O and power architecture, as well as specs of silicon, module, and interconnects. Work with validation, testing and compliance teams to triage, debug, root cause, and fix SI/PI related issues in product integration. Drive the development and deployment of SI/PI focused factory test methodologies and flows.
Minimum Qualifications
- BS/MS/PhD in EE or equivalent.
Preferred Qualifications
-
Solid EE fundamentals and excellent problem solving skills.
-
In-depth knowledge in electrical signaling of common high-speed and low-speed I/O interfaces. Protocol level familiarity is a plus.
-
Strong background in power integrity modeling, simulation, and lab correlation. Familiarity with DC-DC regulator design principles, modeling, and troubleshooting.
-
Proficiency in SI/PI simulation tools such as Cadence/Sigrity, ADS/Spice, Ansys HFSS, CST, etc. Strong programming background is a plus.
-
Hands-on experience in hardware characterization, validation, and failure analysis with lab equipment such as VNA, TDR, Oscilloscope, spectrum analyzer, etc. Compliance testing experience on SerDes links is a plus.
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
Similar jobs, posted recently
Open roles like this one, listed in the last 30 days.
ASIC Packaging Signal/Power Integrity Hardware Engineer (Hybrid)Cisco · San Jose, CA (Hybrid) · $155–223K/yrPosted 2 days agoPosted 2 days ago
Signal and Power Integrity Technical Leader (Remote)Cisco · Remote · US · $214–310K/yrPosted 2 days agoPosted 2 days ago
Senior System Integration and Validation EngineerNVIDIA · Santa Clara, CA (Hybrid) · $168–311K/yrPosted 3w agoPosted 3w ago
Pre-si Power and Performance System Validation EngineerIntel · Austin, TX · $122–232K/yrPosted 1w agoPosted 1w ago
PCB Design Engineer - High-speedCisco · Milpitas, CA · $155–225K/yrPosted 2 days agoPosted 2 days ago
You've read the whole posting — now see how you match it.