
AI Methodology Design/CAD Engineer
Austin, TXJobSeen 2 days agoSeen in employer's feed 2 days ago
Most applications go out cold — see where you stand first. No sign-up to start.
Watch jobs like this. New roles like this one near Austin, TX, by email.
Don't just apply. Show up ready.
Olive works from this exact posting.
At a glance
Olive lists jobs from US employers, including remote roles you can work from the United States.
Requirements
Credentials this posting asks for.
Job overview
As part of Apple’s Silicon Technologies group, the AI Methodology Design/CAD Engineer will design and manufacture next‑generation, power‑efficient processors, collaborating with design teams to apply AI solutions across the chip design flow and ensure high‑quality results.
Skills & qualifications
Skills
Qualifications
Full job description
Role Number: 200686566-0157
Summary
Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you'll be responsible for crafting and building the technology that fuels Apple's devices. Together, you and your team will enable our customers to do all the things they love with their devices.
As part of the Hardware Technology CAD team, you'll help bring AI methodology to chip design. You will work end to end with design teams and CAD flow owners on complex design and CAD challenges, in areas such as custom and analog design, RTL and front end, design verification, physical design, timing, extraction and signoff. You will build and evaluate AI solutions for these challenges, with a focus on the quality of their results. We are looking for a VLSI design or CAD engineer who is passionate about applying AI to chip design.
Description
In this highly visible role, your primary responsibilities will include: Partnering with design teams and CAD flow owners across multiple projects to understand complex design challenges and where AI can help Contributing to evaluation data and quality metrics, and running evaluations across models to find where an agent fails Tuning AI agents, including their prompts, tools, agent skills and choice of model Developing CAD tools and flows that let AI agents work with design data and EDA tools Evaluating AI tools from EDA vendors alongside in-house solutions Enabling the organization to leverage AI capabilities and drive efficiency in chip delivery
Minimum Qualifications
-
Minimum requirement of BS and 3+ years of relevant industry experience
-
Experience using AI tools, such as AI coding assistants, in engineering work
-
Experience in VLSI design, CAD tools or CAD flows
-
Experience in Python programming
Preferred Qualifications
-
Experience building LLM applications or tool-using AI agents, including Model Context Protocol (MCP) servers
-
Experience evaluating or tuning AI systems, such as agent performance or output quality
-
Experience applying machine learning to design data, such as predicting timing or power
-
Understanding of the chip design flow, from spec to tapeout
-
Hands-on knowledge of industry-standard EDA tools for simulation, synthesis, place and route, extraction, timing or physical verification
-
Experience developing CAD tools, CAD flows or design methodology
-
Experience writing testbenches, regression tests or signoff checks
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
Similar jobs, posted recently
Open roles like this one, listed in the last 30 days.
• AI/ML CAD Engineer, RTL & Design VerificationIntel · Austin, TX (Hybrid) · $122–232K/yrPosted 5 days agoPosted 5 days ago
Senior ASIC Design Verification Engineer - LPUNVIDIA · Santa Clara, CA (Hybrid) · $168–311K/yrPosted 1w agoPosted 1w ago
Senior Physical Design EngineerNVIDIA · Santa Clara, CA · $168–265K/yrPosted 4 days agoPosted 4 days ago
Quantum Qubit Design EngineerIntel · Hillsboro, OR · $142–269K/yrPosted 1w agoPosted 1w ago
ASIC Design Engineer – Clocks IPNVIDIA · Santa Clara, CA (Hybrid) · $116–190K/yrPosted 3w agoPosted 3w ago
You've read the whole posting — now see how you match it.