
Lead Software Engineer: AI for Hardware Verification
San Jose, CAFull-time$119–221K/yrSeen 5 days agoSeen in employer's feed 5 days ago
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Job overview
Cadence is seeking a Lead Software Engineer to design and develop AI‑enabled software components for emulation and prototyping workflows, building LLM‑based agents and automation services while applying secure and responsible AI practices.
Skills & qualifications
Skills
Qualifications
Benefits
Full job description
SAN JOSE
Full time
R56507
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Cadence Design Systems Inc. (https://www.cadence.com/) is looking for a motivated Lead Software Engineer to work with us in San Jose, California.
At Cadence, we hire and develop leaders and innovators who want to impact the world of technology. Cadence has been nominated as a Great Place to Work globally and is also a Fortune 100 Best Companies to Work For (https://www.cadence.com/en\_US/home/company/newsroom/press-releases/pr/2020/cadence-named-by-fortune-and-great-place-to-work.html) .
As a Lead Software Engineer, you will be part of the HSV Software team in the SVG group in San Jose, California.
The HSV Software team builds AI-enabled software products that support emulation and prototyping platforms, helping customers accelerate design bring-up, debug, verification, and validation workflows.
To understand more on what we do, you can visit https://www.cadence.com/en\_US/home/tools/system-design-and-verification.html .
Working at Cadence is very dynamic, fast-paced, and integrated with other teams all around the world.
Job Description:
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Design and develop AI-enabled software components for emulation and prototyping workflows, balancing reliability, maintainability, security, latency, cost, and integration with existing product architecture.
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Build LLM-based agents, RAG workflows, and automation services that improve design bring-up, verification, debug, and validation while recommending product enhancements beyond defect fixes.
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Apply secure and responsible AI practices, including data protection, access control, prompt-injection awareness, safe tool use, auditability, and careful handling of sensitive design data.
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Create and execute testing, evaluation, and observability workflows for assigned AI product areas, covering regression tests, retrieval quality, model-output review, tracing, and failure analysis.
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Serve as a technical resource for peers and less-experienced engineers, collaborating with internal partners, senior individual contributors, and managers to deliver high-quality AI-enabled software.
Requirements:
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Bachelor’s degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent experience; typically 4+ years with a Bachelor’s, 2+ years with a Master’s, or PhD-level preparation in related software development.
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Strong Python skills and software engineering fundamentals, including APIs, testing, debugging, maintainability, Unix/Linux environments, and distributed development workflows.
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Hands-on experience building AI-enabled applications, agentic workflows, or automation services using LLM APIs, open-source models, enterprise AI platforms, and orchestration tools such as LangGraph, LangChain, AutoGen, CrewAI, or similar frameworks.
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Understanding of modern RAG and agentic AI patterns, including retrieval, chunking, embeddings, vector or hybrid search, reranking, tool calling, workflow orchestration, human-in-the-loop review, and traceability.
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Ability to evaluate, secure, and debug AI product behavior using golden datasets, regression tests, hallucination checks, prompt and retrieval analysis, observability traces, quality metrics, and responsible AI practices.
Nice to have:
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Experience developing software using version control systems and modern CI/CD practices.
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Experience with other programming languages such as C++, Tcl, or JavaScript/TypeScript.
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Knowledge or experience with design verification, emulation, prototyping, or hardware-assisted debug workflows.
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Knowledge or experience with EDA and VLSI design, including Verilog, SystemVerilog, or VHDL.
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Exposure to practical AI application security, such as prompt-injection awareness, safe tool integration, access control, input/output validation, or secure handling of design data.
Additional Job Details:
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Employment category: Full-time.
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Employment term: 40 hours/week.
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Competitive benefits.
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Location: San Jose, California.
About Cadence Design Systems:
Cadence is the only company that provides the expertise and tools, IP, and hardware required for the entire electronics design chain, from chip design to chip packaging to boards and to systems. We enable electronic systems and semiconductor companies to create innovative products that transform the way people live, work, and play. Our products are used in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments. For more information, access http://www.cadence.com.
We’re doing work that matters. Help us solve what others can’t.
The annual salary range for California is $119,000 to $221,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
We’re doing work that matters. Help us solve what others can’t.
Additional Jobs (https://cadence.wd1.myworkdayjobs.com/addl\_jobs)
Equal Employment Opportunity Policy:
Cadence is committed to equal employment opportunity throughout all levels of the organization.
- Read the policy(opens in a new tab) (https://www.cadence.com/content/dam/cadence-www/global/en\_US/documents/company/careers/equal-employment-opportunity-policy.pdf)
We welcome your interest in the company and want to make sure our job site is accessible to all. If you experience difficulty using this site or to request a reasonable accommodation, please contact [email protected].
Privacy Policy:
Job Applicant If you are a job seeker creating a profile using our careers website, please see the privacy policy(opens in a new tab) (https://www.cadence.com/en\_US/home/privacy/privacy-policy.html) .
E-Verify Cadence participates in the
E-Verify program in certain U.S. locations as required by law. Download More Information on E-Verify (64K) (https://www.cadence.com/content/dam/cadence-www/global/en\_US/documents/company/careers/e-verify-participation-poster.pdf)
Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences.
Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world’s toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence.
Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.
Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.
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