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Senior Silicon Substrate & Packaging Manufacturing Engineer

Fractile

TaiwanFull-timeNo compensation foundPosted 4mo agoVerified open 4 days ago

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At a glance

Compensation
No compensation found
Location
Taiwan
Schedule
Full-time
Work Authorization
Not specified

Job overview

Fractile is hiring a Senior Silicon Substrate & Packaging Manufacturing Engineer. Fractile is seeking a Senior Silicon Substrate & Packaging Manufacturing Engineer to lead packaging manufacturing execution in Taiwan. This role involves driving products from first silicon through high-volume production, with a direct impact on the company's trajectory. The engineer will be the senior manufacturing authority for substrate and package assembly, focusing on yield, ramp velocity, and supplier performance.

Key focus areas include Own packaging yield and ramp performance, Lead manufacturing strategy with OSATs and substrate suppliers, and Drive structured problem-solving under schedule pressure.

Successful candidates bring 8+ Years Semiconductor Packaging Experience. Important skills include Packaging Yield And Ramp Performance, Manufacturing Strategy, Structured Problem-Solving, Scalable Manufacturing Discipline, Manufacturing Readiness Criteria Definition, and NPI Builds Leadership. Preferred (not required): Large AI / HPC ASICs Experience and 2.5D Packaging.

Skills & qualifications

RequiredNice to have

Skills

Packaging Yield and Ramp PerformanceManufacturing StrategyStructured Problem-SolvingScalable Manufacturing DisciplineManufacturing Readiness Criteria DefinitionNPI Builds LeadershipScaling Risks IdentificationPackage Decisions InfluenceAssembly Yield TargetsRoot-Cause AnalysisCorrective Actions Implementation and ValidationData-Driven MonitoringSPCCpkExcursion Response FrameworksTechnical Escalation PointPerformance Expectations SettingContinuous ImprovementYield ImprovementCycle Time ImprovementProcess Capability ImprovementCost Structure ImprovementStrong Working RelationshipsQualification ExecutionReliability ClosurePackaging RobustnessFailure AnalysisProcess Controls StrengtheningRamp Plans DefinitionYield Maturation CurvesRamp Health TrackingSubstrate and Capacity Risks MitigationPost-Ramp Cost-DownYield Stabilization InitiativesFC-BGA RampingAdvanced Packages RampingFlip-Chip Assembly FlowsLarge Body Substrate Warpage ControlUnderfill and Reliability InteractionsAssembly Defect Pareto AnalysisProcess Capability MetricsWorking With Taiwan OSATsWorking With Substrate VendorsIndependent OperationPrincipled TradeoffsDiagnose IssuesDrive AlignmentSystems Design That ScalesLarge AI / HPC ASICs Experience2.5D Packaging

Qualifications

8+ Years in Semiconductor Packaging Manufacturing8+ Years in Product Engineering

Full job description

Fractile is building silicon, systems and software which will redefine the frontier of AI: running the world’s most advanced models at radically higher speed and lower cost. We have an exceptional team across hardware and software capable of bringing about this change, and we are growing fast to meet demand and deliver our product at scale.

At this level of compute density and bandwidth, manufacturing precision is a competitive weapon. Yield, ramp velocity, and supplier performance are not operational details — they determine whether we win.

We are hiring a Senior Silicon Substrate & Packaging Manufacturing Engineer to own packaging manufacturing execution in Taiwan and drive our products from first silicon through high-volume production.

This is a high-accountability role with direct impact on the company's trajectory.

The Role

You will be Fractile’s senior manufacturing authority in Taiwan for substrate and package assembly.

You will:

  • Own packaging yield and ramp performance.
  • Lead manufacturing strategy with OSATs and substrate suppliers.
  • Drive structured problem-solving under schedule pressure.
  • Build scalable manufacturing discipline in a startup environment. You are not coordinating — you are deciding, driving, and delivering.

What You’ll Own

Manufacturing Strategy & NPI Leadership

  • Define packaging manufacturing readiness criteria from EVT through HVM.

  • Lead NPI builds (EVT/DVT/PVT) with clear yield and quality targets.

  • Identify scaling risks early (process capability, warpage, cycle time, substrate constraints).

  • Influence package decisions based on manufacturability and ramp risk. Yield & Excursion Leadership

  • Own assembly yield targets and improvement roadmaps.

  • Lead deep root-cause analysis across OSAT and substrate partners.

  • Drive implementation and validation of permanent corrective actions.

  • Establish data-driven monitoring (SPC, Cpk, excursion response frameworks). Supplier Performance Management

  • Act as the senior technical escalation point for OSAT and substrate vendors.

  • Set performance expectations and hold partners accountable.

  • Drive continuous improvement in:

  • Yield

  • Cycle time

  • Process capability

  • Cost structure

  • Build strong working relationships while maintaining high standards. Reliability & Production Robustness

  • Own qualification execution and reliability closure.

  • Ensure packaging robustness under high current density and AI workloads.

  • Drive failure analysis across material, assembly, and process domains.

  • Prevent repeat escapes by strengthening process controls. Ramp to High Volume

  • Define ramp plans and yield maturation curves.

  • Track ramp health and escalate risk to leadership early.

  • Partner with supply chain to mitigate substrate and capacity risks.

  • Lead post-ramp cost-down and yield stabilization initiatives. What We’re Looking For

  • 8+ years in semiconductor packaging manufacturing or product engineering.

  • Proven experience ramping complex FC-BGA or advanced packages to volume.

  • Deep understanding of:

  • Flip-chip assembly flows

  • Large body substrate warpage control

  • Underfill and reliability interactions

  • Assembly defect pareto analysis

  • SPC and process capability metrics

  • Strong track record working directly with Taiwan OSATs and substrate vendors.

  • Demonstrated ownership of yield improvement programs. Strong Plus

  • Experience with large AI / HPC ASICs.

  • Exposure to 2.5D or high-bandwidth memory packaging.

  • Experience ramping first-generation silicon in a startup or fast-scaling environment.

  • Fluent Mandarin and English. What Senior Means at Fractile

At Fractile, “Senior” means:

  • You operate independently.
  • You escalate before problems become crises.
  • You make principled tradeoffs between performance, yield, cost, and schedule.
  • You can walk into a supplier factory, diagnose issues, and drive alignment.
  • You think beyond the build in front of you and design systems that scale. Why This Role Is Critical

Packaging yield and ramp speed directly impact revenue, customer commitments, and strategic momentum.

This role ensures:

  • First silicon does not stall.
  • Ramp is predictable.
  • Suppliers perform at our standard.
  • Manufacturing becomes a competitive advantage. If you perform well in this role, you will shape how Fractile scales its hardware globally.

About us

  • Founded in 2022, team of 70+, which is expanding rapidly
  • Modern, open offices in London and Bristol
  • Collaborative, problem-solving culture built on deep curiosity, entrepreneurial initiative and technical fluency Export control and security clearance

Certain roles may involve working on technologies subject to export restrictions. Applicants may be required to undergo additional eligibility checks to ensure compliance with applicable law.

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