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Staff Semiconductor Device Modeling Engineer

Intel

Hillsboro, ORHybridJob$150–285K/yrPosted 3w agoVerified open 5 days ago

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At a glance

Compensation
$150–285K/yr
Location
Hillsboro, ORHybrid
Work Authorization
Not specified

Requirements

Credentials this posting asks for.

Bachelor's degree

Job overview

Intel is hiring a Staff Semiconductor Device Modeling Engineer. The Staff Semiconductor Device Modeling Engineer at Intel will advance circuit simulation and modeling capabilities for next‑generation semiconductor technologies, collaborating across teams to develop high‑quality tools, align with roadmaps, and accelerate product delivery for Intel Foundry customers.

Key focus areas include Partner with technology leaders and PDK teams to ensure modeling capabilities align with roadmap requirements, Drive readiness and validation of simulation and modeling solutions to meet PDK delivery milestones, and Develop compact device models for transistor modeling, including layout‑dependent effects and circuit performance impacts.

Successful candidates bring Bachelor's Degree In Electrical Engineering Or Related Discipline, 6+ Years Industry Experience In Semiconductor Field, and 4+ Years Relevant Industry Experience. Important skills include Electronic circuit simulation, Compliance, Physics, Circuit Simulation, Modeling Capabilities, and Compact Device Models. Preferred (not required): Hiring Practices, Marketplace, Process Flow Documentation, and Statistical Modeling.

Skills & qualifications

RequiredNice to have

Skills

Electronic Circuit SimulationCompliancePhysicsHiring PracticesMarketplaceProcess Flow DocumentationStatistical ModelingTool DesignAutomationCorporate Social ResponsibilitySemiconductor Device ModelingRFIntegrated Circuit DesignBenchmarkingMachine LearningPythonScriptingAnalyticsModelingAlgorithmsCircuit SimulationModeling CapabilitiesCompact Device ModelsFinFETGAATransistor ModelingLayout-Dependent EffectsCircuit Performance ImpactsData AnalysisPython ScriptingDevice Targeting Benchmarking CircuitsSelf-Heating EffectsOpen Model Interface (OMI) ModelingHSPICESpectreICCAPMBPRF SimulationEM SimulationDevice PhysicsRF ModelingRF Structure DesignRF De-EmbeddingLeading Technical InitiativesMachine Learning AlgorithmsProcess FlowsCircuit DesignSimulation MethodologiesGAAFET

Qualifications

Bachelor's Degree in Electrical Engineering or Related Discipline or Master's Degree in Electrical Engineering or Related Discipline or Ph.D. In Electrical Engineering or Related Discipline2+ Years Hands‑on Experience With Compact Modeling Techniques for Advanced Nodes Such as FinFET and GAAFET2+ Years Experience With Commercial Simulators HSPICE and Spectre2+ Years Experience With Extraction Tools ICCAP and MBPExperience in Python Scripting for Data Analysis and AutomationExperience in Statistical ModelingExperience in RF SimulationExperience in EM Simulation6+ Years Industry Experience in Semiconductor Field4+ Years Industry Experience in Semiconductor Field2+ Years Industry Experience in Semiconductor FieldPh.D. With 3+ Years Industry Experience in Semiconductor Field

Benefits

Medical Insurance

Full job description

Job Details:

Job Description:  The Role and Impact As a Staff Device Modeling Engineer, you will play a pivotal role in advancing circuit simulation and modeling capabilities for next-generation semiconductor technologies. Your daily responsibilities will include collaborating with cross-functional teams to drive the development of high-quality simulation tools and methodologies, ensuring alignment with technology roadmaps, and enabling optimized solutions for process design kits (PDKs). Your contributions will directly impact accelerating product delivery timelines and enhancing Intel's leadership in the foundry space.

Business Group You will be joining Intel's Design Technology Platform (DTP) organization, a critical pillar that empowers Intel Foundry customers to produce cutting-edge products for the marketplace. The Compact Device Modeling Group (CDMG), within DTP, focuses on co-optimizing Intel's state-of-the-art process technology and design tools to enable the development of innovative, high-performance products. As part of this team, you will contribute to the modeling solutions that allow design teams to deliver leadership products for data-centric applications faster and with greater precision.

Key Responsibilities

  • Partner with technology leaders and PDK teams to ensure modeling capabilities align with roadmap requirements.
  • Drive readiness and validation of simulation and modeling solutions to meet PDK delivery milestones.
  • Develop compact device models (e.g., FinFET, GAA) for transistor modeling, including layout-dependent effects and circuit performance impacts.
  • Conduct statistical modeling, simulation, and data analysis using Python scripting and other relevant tools.
  • Implement innovative methodologies for device targeting benchmarking circuits, self-heating effects, and Open Model Interface (OMI) modeling.
  • Collaborate across multiple teams and geographies to achieve seamless integration and optimized solutions.

Qualifications:

  • Bachelor's degree in Electrical Engineering or a related discipline with 6+ years of industry experience in the semiconductor field; -OR- Master's degree in Electrical Engineering or a related discipline with 4+ years of relevant industry experience; -OR- Ph.D. in Electrical Engineering or a related discipline with 2+ years of experience.
  • 2+ years of hands-on experience with compact modeling techniques for advanced nodes such as FinFET and GAAFET.
  • Proficiency with commercial simulators (e.g., HSPICE, Spectre) and extraction tools (e.g., ICCAP, MBP).
  • Experience in Python scripting for data analysis and automation.
  • Experience in statistical modeling, RF simulation, and EM simulation.

Preferred Qualifications

  • Ph.D. in Electrical Engineering or a related discipline with 3+ years of industry experience in the semiconductor field.
  • Strong background in Device physics and RF modeling.
  • Experience in RF structure design, RF De-embedding and EM simulation.
  • Experience collaborating across teams and geographies, with experience leading technical initiatives.
  • Experience with machine learning algorithms and their application in compact model development.
  • Strong understanding of process flows, circuit design, and simulation methodologies.

Join us in shaping the future of semiconductor technology innovation. Take the next step in your career by applying today and becoming part of a team dedicated to driving impactful solutions for Intel Foundry customers worldwide.

Job Type: Experienced Hire

Shift: Shift 1 (United States of America)

Primary Location:  US, Oregon, Hillsboro

Additional Locations: US, California, Santa Clara

Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel .

Annual Salary Range for jobs which could be performed in the US: $149,600.00-284,580.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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